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author | Chris Lattner <sabre@nondot.org> | 2008-11-11 19:34:28 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2008-11-11 19:34:28 +0000 |
commit | 528875c229fe468b8c36277664582834dac8d327 (patch) | |
tree | 6377998bd471ddd39114e594c84292e92b915e5d /docs/WritingAnLLVMBackend.html | |
parent | 90d45b8a4a787739662dc1c781dc0e7c57c2ffa2 (diff) | |
download | external_llvm-528875c229fe468b8c36277664582834dac8d327.zip external_llvm-528875c229fe468b8c36277664582834dac8d327.tar.gz external_llvm-528875c229fe468b8c36277664582834dac8d327.tar.bz2 |
fix some validation errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59069 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs/WritingAnLLVMBackend.html')
-rw-r--r-- | docs/WritingAnLLVMBackend.html | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/docs/WritingAnLLVMBackend.html b/docs/WritingAnLLVMBackend.html index 9612f55..e57a2dd 100644 --- a/docs/WritingAnLLVMBackend.html +++ b/docs/WritingAnLLVMBackend.html @@ -21,35 +21,35 @@ <li><a href="#Preliminaries">Preliminaries</a></li> </ul> <li><a href="#TargetMachine">Target Machine</a></li> - <li><a href="#RegisterSet">Register Set and Register Classes</a></li> + <li><a href="#RegisterSet">Register Set and Register Classes</a> <ul> <li><a href="#RegisterDef">Defining a Register</a></li> <li><a href="#RegisterClassDef">Defining a Register Class</a></li> <li><a href="#implementRegister">Implement a subclass of TargetRegisterInfo</a></li> - </ul> - <li><a href="#InstructionSet">Instruction Set</a></li> + </ul></li> + <li><a href="#InstructionSet">Instruction Set</a> <ul> <li><a href="#implementInstr">Implement a subclass of TargetInstrInfo</a></li> <li><a href="#branchFolding">Branch Folding and If Conversion</a></li> - </ul> - <li><a href="#InstructionSelector">Instruction Selector</a></li> + </ul></li> + <li><a href="#InstructionSelector">Instruction Selector</a> <ul> - <li><a href="#LegalizePhase">The SelectionDAG Legalize Phase</a></li> + <li><a href="#LegalizePhase">The SelectionDAG Legalize Phase</a> <ul> <li><a href="#promote">Promote</a></li> <li><a href="#expand">Expand</a></li> <li><a href="#custom">Custom</a></li> <li><a href="#legal">Legal</a></li> - </ul> + </ul></li> <li><a href="#callingConventions">Calling Conventions</a></li> - </ul> + </ul></li> <li><a href="#assemblyPrinter">Assembly Printer</a></li> <li><a href="#subtargetSupport">Subtarget Support</a></li> - <li><a href="#jitSupport">JIT Support</a></li> + <li><a href="#jitSupport">JIT Support</a> <ul> <li><a href="#mce">Machine Code Emitter</a></li> <li><a href="#targetJITInfo">Target JIT Info</a></li> - </ul> + </ul></li> </ol> <div class="doc_author"> @@ -99,7 +99,7 @@ LLVM backend to generate code for a specific hardware or software target.</p> These essential documents must be read before reading this document: <ul> <li> -<it><a href="http://www.llvm.org/docs/LangRef.html">LLVM Language Reference Manual</a></it> - +<i><a href="http://www.llvm.org/docs/LangRef.html">LLVM Language Reference Manual</a></i> - a reference manual for the LLVM assembly language </li> <li> |