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| author | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
| commit | dce4a407a24b04eebc6a376f8e62b41aaa7b071f (patch) | |
| tree | dcebc53f2b182f145a2e659393bf9a0472cedf23 /docs/index.rst | |
| parent | 220b921aed042f9e520c26cffd8282a94c66c3d5 (diff) | |
| download | external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.zip external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.gz external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.bz2 | |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
Diffstat (limited to 'docs/index.rst')
| -rw-r--r-- | docs/index.rst | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/docs/index.rst b/docs/index.rst index 726a392..1d4fbd9 100644 --- a/docs/index.rst +++ b/docs/index.rst @@ -215,6 +215,7 @@ For API clients and LLVM developers. AliasAnalysis BitCodeFormat + BlockFrequencyTerminology BranchWeightMetadata Bugpoint CodeGenerator @@ -236,6 +237,7 @@ For API clients and LLVM developers. NVPTXUsage StackMaps InAlloca + BigEndianNEON :doc:`WritingAnLLVMPass` Information on how to write LLVM transformations and analyses. @@ -248,7 +250,7 @@ For API clients and LLVM developers. working on retargetting LLVM to a new architecture, designing a new codegen pass, or enhancing existing components. -:doc:`TableGen Fundamentals <TableGen/index>` +:doc:`TableGen <TableGen/index>` Describes the TableGen tool, which is used heavily by the LLVM code generator. @@ -298,6 +300,10 @@ For API clients and LLVM developers. :doc:`BranchWeightMetadata` Provides information about Branch Prediction Information. +:doc:`BlockFrequencyTerminology` + Provides information about terminology used in the ``BlockFrequencyInfo`` + analysis pass. + :doc:`SegmentedStacks` This document describes segmented stacks and how they are used in LLVM. @@ -314,6 +320,11 @@ For API clients and LLVM developers. LLVM support for mapping instruction addresses to the location of values and allowing code to be patched. +:doc:`BigEndianNEON` + LLVM's support for generating NEON instructions on big endian ARM targets is + somewhat nonintuitive. This document explains the implementation and rationale. + + Development Process Documentation ================================= |