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author | Reid Spencer <rspencer@reidspencer.com> | 2007-07-20 19:59:11 +0000 |
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committer | Reid Spencer <rspencer@reidspencer.com> | 2007-07-20 19:59:11 +0000 |
commit | 2067764e29dc2fd6d4d4b48940f41744eaff6d14 (patch) | |
tree | a928407ac176eb2b9ec1a43790cc9c75b9f4b597 /docs | |
parent | 2eb93b3f03fb1167f7d40a1d5a17e84bb95d0510 (diff) | |
download | external_llvm-2067764e29dc2fd6d4d4b48940f41744eaff6d14.zip external_llvm-2067764e29dc2fd6d4d4b48940f41744eaff6d14.tar.gz external_llvm-2067764e29dc2fd6d4d4b48940f41744eaff6d14.tar.bz2 |
Fix validation errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40116 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs')
-rw-r--r-- | docs/LangRef.html | 26 |
1 files changed, 10 insertions, 16 deletions
diff --git a/docs/LangRef.html b/docs/LangRef.html index da7c7e1..fa7fefa 100644 --- a/docs/LangRef.html +++ b/docs/LangRef.html @@ -200,11 +200,11 @@ <li><a href="#int_memory_barrier">'<tt>llvm.memory.barrier</tt>' Intrinsic</a></li> </ol> </li> - <li><a href="#int_general">General intrinsics</a></li> + <li><a href="#int_general">General intrinsics</a> <ol> - <li><a href="#int_var_annotation">'<tt>llvm.var.annotation</tt>' - Intrinsic</a></li> - </ol> + <li><a href="#int_var_annotation"> + <tt>llvm.var.annotation</tt>' Intrinsic</a></li> + </ol> </li> </ol> </li> @@ -282,7 +282,7 @@ by the verifier pass indicate bugs in transformation passes or input to the parser.</p> </div> -<!-- Describe the typesetting conventions here. --> </div> +<!-- Describe the typesetting conventions here. --> <!-- *********************************************************************** --> <div class="doc_section"> <a name="identifiers">Identifiers</a> </div> @@ -4848,7 +4848,7 @@ Handling</a> document. </p> <p> These do <em>not</em> form an API such as high-level threading libraries, software transaction memory systems, atomic primitives, and intrinsic - functionss as found in BSD, GNU libc, atomic_ops, APR, and other system and + functions as found in BSD, GNU libc, atomic_ops, APR, and other system and application libraries. The hardware interface provided by LLVM should allow a clean implementation of all of these APIs and parallel programming models. No one model or paradigm should be selected above others unless the hardware @@ -4864,14 +4864,13 @@ Handling</a> document. </p> <h5>Syntax:</h5> <p> This is an overloaded intrinsic. You can use <tt>llvm.atomic.lcs</tt> on any - integer bit width. Not all targets support all bit widths however. + integer bit width. Not all targets support all bit widths however.</p> <pre> declare i8 @llvm.atomic.lcs.i8.i8p.i8.i8( i8* <ptr>, i8 <cmp>, i8 <val> ) declare i16 @llvm.atomic.lcs.i16.i16p.i16.i16( i16* <ptr>, i16 <cmp>, i16 <val> ) declare i32 @llvm.atomic.lcs.i32.i32p.i32.i32( i32* <ptr>, i32 <cmp>, i32 <val> ) declare i64 @llvm.atomic.lcs.i64.i64p.i64.i64( i64* <ptr>, i64 <cmp>, i64 <val> ) </pre> -</p> <h5>Overview:</h5> <p> This loads a value in shared memory and compares it to a given value. If they @@ -4920,14 +4919,13 @@ declare i64 @llvm.atomic.lcs.i64.i64p.i64.i64( i64* <ptr>, i64 <cmp> <h5>Syntax:</h5> <p> This is an overloaded intrinsic. You can use <tt>llvm.atomic.ls</tt> on any - integer bit width. Not all targets support all bit widths however. + integer bit width. Not all targets support all bit widths however.</p> <pre> declare i8 @llvm.atomic.ls.i8.i8p.i8( i8* <ptr>, i8 <val> ) declare i16 @llvm.atomic.ls.i16.i16p.i16( i16* <ptr>, i16 <val> ) declare i32 @llvm.atomic.ls.i32.i32p.i32( i32* <ptr>, i32 <val> ) declare i64 @llvm.atomic.ls.i64.i64p.i64( i64* <ptr>, i64 <val> ) </pre> -</p> <h5>Overview:</h5> <p> This intrinsic loads the value stored in shared memory at <tt>ptr</tt> and @@ -4975,14 +4973,13 @@ declare i64 @llvm.atomic.ls.i64.i64p.i64( i64* <ptr>, i64 <val> ) <h5>Syntax:</h5> <p> This is an overloaded intrinsic. You can use <tt>llvm.atomic.las</tt> on any - integer bit width. Not all targets support all bit widths however. + integer bit width. Not all targets support all bit widths however.</p> <pre> declare i8 @llvm.atomic.las.i8.i8p.i8( i8* <ptr>, i8 <delta> ) declare i16 @llvm.atomic.las.i16.i16p.i16( i16* <ptr>, i16 <delta> ) declare i32 @llvm.atomic.las.i32.i32p.i32( i32* <ptr>, i32 <delta> ) declare i64 @llvm.atomic.las.i64.i64p.i64( i64* <ptr>, i64 <delta> ) </pre> -</p> <h5>Overview:</h5> <p> This intrinsic adds <tt>delta</tt> to the value stored in shared memory at @@ -5023,14 +5020,13 @@ declare i64 @llvm.atomic.las.i64.i64p.i64( i64* <ptr>, i64 <delta> ) <h5>Syntax:</h5> <p> This is an overloaded intrinsic. You can use <tt>llvm.atomic.lss</tt> on any - integer bit width. Not all targets support all bit widths however. + integer bit width. Not all targets support all bit widths however.</p> <pre> declare i8 @llvm.atomic.lss.i8.i8.i8( i8* <ptr>, i8 <delta> ) declare i16 @llvm.atomic.lss.i16.i16.i16( i16* <ptr>, i16 <delta> ) declare i32 @llvm.atomic.lss.i32.i32.i32( i32* <ptr>, i32 <delta> ) declare i64 @llvm.atomic.lss.i64.i64.i64( i64* <ptr>, i64 <delta> ) </pre> -</p> <h5>Overview:</h5> <p> This intrinsic subtracts <tt>delta</tt> from the value stored in shared @@ -5070,11 +5066,9 @@ declare i64 @llvm.atomic.lss.i64.i64.i64( i64* <ptr>, i64 <delta> ) </div> <div class="doc_text"> <h5>Syntax:</h5> -<p> <pre> declare void @llvm.memory.barrier( i1 <ll>, i1 <ls>, i1 <sl>, i1 <ss> ) </pre> -</p> <h5>Overview:</h5> <p> The <tt>llvm.memory.barrier</tt> intrinsic guarantees ordering between |