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author | Wesley Peck <peckw@wesleypeck.com> | 2010-04-22 13:43:14 +0000 |
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committer | Wesley Peck <peckw@wesleypeck.com> | 2010-04-22 13:43:14 +0000 |
commit | 9e385b1367368155c158dd8535fc548866173536 (patch) | |
tree | 0c75f7bb61eab94db95620eacf2b7dbe8ffc9f6e /docs | |
parent | 640604ae63d44667de7f89d5a9498f50a85ae809 (diff) | |
download | external_llvm-9e385b1367368155c158dd8535fc548866173536.zip external_llvm-9e385b1367368155c158dd8535fc548866173536.tar.gz external_llvm-9e385b1367368155c158dd8535fc548866173536.tar.bz2 |
Fixing small typos in the "ARM Target Improvements" section of the release notes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102061 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs')
-rw-r--r-- | docs/ReleaseNotes.html | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/docs/ReleaseNotes.html b/docs/ReleaseNotes.html index bf2fb6b..e9aea6c 100644 --- a/docs/ReleaseNotes.html +++ b/docs/ReleaseNotes.html @@ -701,10 +701,10 @@ href="http://blog.llvm.org/2010/04/arm-advanced-simd-neon-intrinsics-and.html"> ARM Advanced SIMD (NEON) Intrinsics and Types in LLVM Blog Post</a> for helpful information if migrating code from GCC to LLVM-GCC.</li> -<li>The ARM and Thumb code generators now using register scavenging for stack +<li>The ARM and Thumb code generators now use register scavenging for stack object address materialization.(FIXME: WHAT BENEFIT DOES THIS PROVIDE?)</li> -<li>The ARM backend now has good support for ARMv4 targets, and has been tested +<li>The ARM backend now has good support for ARMv4 targets and has been tested on StrongARM hardware. Previously, LLVM only supported ARMv4T and newer chips.</li> </ul> |