More pods... work in progress

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13574 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 303 insertions, 0 deletions

diff --git a/docs/CommandGuide/Makefile b/docs/CommandGuide/Makefile
new file mode 100644
index 0000000..730718b
--- /dev/null
+++ b/docs/CommandGuide/Makefile
@@ -0,0 +1,23 @@
+POD = $(wildcard *.pod)
+HTML = $(patsubst %.pod, %.html, $(POD))
+MAN = $(patsubst %.pod, %.1, $(POD))
+PS = $(patsubst %.pod, %.ps, $(POD))
+
+all: $(HTML) $(MAN) $(PS)
+
+.SUFFIXES:
+.SUFFIXES: .html .pod .1 .ps
+
+%.html: %.pod
+	pod2html --css=http://www.perldoc.com/css/perldoc.css \
+		--podpath=/`pwd` --noindex --infile=$< --outfile=$@
+
+%.1: %.pod
+	pod2man --release=1.3 --center="LLVM User's Guide" $< $@
+
+%.ps: %.1
+	groff -Tps -man $< > $@
+
+clean:
+	rm -f pod2htm*.*~~ $(HTML) $(MAN) $(PS)
+
diff --git a/docs/CommandGuide/llc.pod b/docs/CommandGuide/llc.pod
new file mode 100644
index 0000000..2f812b9
--- /dev/null
+++ b/docs/CommandGuide/llc.pod
@@ -0,0 +1,204 @@
+
+=pod
+
+=head1 NAME
+
+llc - LLVM static compiler
+
+=head1 SYNOPSIS
+
+llc [options] [filename]
+
+=head1 DESCRIPTION
+
+The B<llc> command compiles LLVM bytecode into assembly language for a
+specified architecture.  The assembly language output can then be passed through
+a native assembler and linker to generate native code.
+
+The choice of architecture for the output assembly code is determined as
+follows, by attempting to satisfy each of the following rules in turn (first
+one wins):
+
+=over
+
+=item *
+
+If the user has specified an architecture with the -m option, use that
+architecture.
+
+=item *
+
+Examine the input LLVM bytecode file: if it is little endian and has a
+pointer size of 32 bits, select the Intel IA-32 architecture.  If it is big
+endian and has a pointer size of 64 bits, select the SparcV9 architecture.
+
+=item *
+
+If B<llc> was compiled on an architecture for which it can generate code, select
+the architecture upon which B<llc> was compiled.
+
+=item *
+
+Exit with an error message telling the user to specify the output
+architecture explicitly.
+
+=back
+
+=head1 OPTIONS
+
+If I<filename> is - or omitted, B<llc> reads LLVM bytecode from standard input.
+Otherwise, it will read LLVM bytecode from I<filename>.
+
+If the B<-o> option is omitted, then B<llc> will send its output to standard
+output if the input is from standard input.  If the B<-o> option specifies -,
+then the output will also be sent to standard output.
+
+If no B<-o> option is specified and an input file other than - is specified,
+then B<llc> creates the output filename by taking the input filename,
+removing any existing F<.bc> extension, and adding a F<.s> suffix.
+
+Other B<llc> options are as follows:
+
+=over
+
+=item B<-f>
+
+Overwrite output files. By default, B<llc> will refuse to overwrite
+an output file which already exists.
+
+=item B<-march>=I<arch>
+
+Specify the architecture for which to generate assembly.  Valid
+architectures are:
+
+=over
+
+=item I<x86>
+
+Intel IA-32 (Pentium and above)
+
+=item I<sparcv9>
+
+64-bit SPARC V9
+
+=item I<c>
+
+Emit C code, not assembly
+
+=back
+
+=item B<-enable-correct-eh-support>
+
+Instruct the B<-lowerinvoke> pass to insert code for correct exception handling
+support.  This is expensive and is by default omitted for efficiency.
+
+=item B<-help>
+
+Print a summary of command line options.
+
+=item B<-stats>
+
+Print statistics recorded by code-generation passes.
+
+=item B<-time-passes>
+
+Record the amount of time needed for each pass and print a report to standard
+error.
+
+=back
+
+=head2 Intel IA-32-specific Options
+
+=over
+
+=item B<--disable-fp-elim>
+
+Disable frame pointer elimination optimization.
+
+=item B<--disable-pattern-isel>
+
+Use the 'simple' X86 instruction selector (the default).
+
+=item B<--print-machineinstrs>
+
+Print generated machine code.
+
+=item B<--regalloc>=I<allocator>
+
+Specify the register allocator to use. The default I<allocator> is I<local>.
+Valid register allocators are:
+
+=over
+
+=item I<simple>
+
+Very simple "always spill" register allocator
+
+=item I<local>
+
+Local register allocator
+
+=item I<linearscan>
+
+Linear scan global register allocator (experimental)
+
+=back
+
+=item B<--spiller>=I<spiller>
+
+Specify the spiller to use for register allocators that support it.  Currently
+this option is used only by the linear scan register allocator. The default
+I<spiller> is I<local>.  Valid spillers are:
+
+=over
+
+=item I<simple>
+
+Simple spiller
+
+=item I<local>
+
+Local spiller
+
+=back
+
+=back
+
+=head2 SPARCV9-specific Options
+
+=over
+
+=item B<--disable-peephole>
+
+Disable peephole optimization pass.
+
+=item B<--disable-sched>
+
+Disable local scheduling pass.
+
+=item B<--disable-strip>
+
+The Sparc backend embeds the LLVM bytecode into the assembly output.  This
+option requests that symbol names be retained; by default, they are stripped out.
+
+=item B<--enable-maps>
+
+Emit LLVM-to-machine code mapping information into the assembly output.
+
+=back
+
+=head1 EXIT STATUS
+
+If B<llc> succeeds, it will exit with 0.  Otherwise, if an error occurs,
+it will exit with a non-zero value.
+
+=head1 SEE ALSO
+
+L<lli>
+
+=head1 AUTHORS
+
+Maintained by the LLVM Team (L<http://llvm.cs.uiuc.edu>).
+
+=cut
+
diff --git a/docs/CommandGuide/lli.pod b/docs/CommandGuide/lli.pod
new file mode 100644
index 0000000..0f1fb96
--- /dev/null
+++ b/docs/CommandGuide/lli.pod
@@ -0,0 +1,76 @@
+=pod
+
+=head1 NAME
+
+lli - directly execute programs from LLVM bytecode
+
+=head1 SYNOPSIS
+
+lli [options] [filename] [args ...]
+
+=head1 DESCRIPTION
+
+B<lli> directly executes programs in LLVM bytecode format.  It takes a program in
+LLVM bytecode format and executes it using a just-in-time compiler, if one is
+available for the current architecture, or an interpreter.  B<lli> takes
+all of the same code generator options as L<llc|llc>, but they are only effective
+when B<lli> is using the just-in-time compiler.
+
+If I<filename> is not specified, then B<lli> reads the LLVM bytecode for the
+program from standard input.
+
+The optional I<args> specified on the command line are passed to the program as
+arguments.
+
+=head1 OPTIONS
+
+=over
+
+=item B<-help>
+
+Print a summary of command line options.
+
+=item B<-stats>
+
+Print statistics from the code-generation passes. This is only meaningful for
+the just-in-time compiler, at present.
+
+=item B<-time-passes>
+
+Record the amount of time needed for each code-generation pass and print it to
+standard error.
+
+=item B<-march>=I<arch>
+
+Use the specified non-default architecture arch when selecting a code generator
+for the just-in-time compiler. This may result in a crash if you pick an
+architecture which is not compatible with the hardware you are running B<lli> on.
+
+=item B<-force-interpreter>=I<{false,true}>
+
+If set to true, use the interpreter even if a just-in-time compiler is available
+for this architecture. Defaults to false.
+
+=item B<-f>=I<name>
+
+Call the function named I<name> to start the program.  Note: The
+function is assumed to have the C signature C<int> I<name> C<(int,
+char **, char **)>.  If you try to use this option to call a function of
+incompatible type, undefined behavior may result. Defaults to C<main>.
+
+=back
+
+=head1 EXIT STATUS
+
+If B<lli> fails to load the program, it will exit with an exit code of 1.
+Otherwise, it will return the exit code of the program it executes.
+
+=head1 SEE ALSO
+
+L<llc>
+
+=head1 AUTHOR
+
+Maintained by the LLVM Team (L<http://llvm.cs.uiuc.edu>).
+
+=cut