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author | Andrew Trick <atrick@apple.com> | 2012-02-09 00:40:55 +0000 |
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committer | Andrew Trick <atrick@apple.com> | 2012-02-09 00:40:55 +0000 |
commit | f7b96311d20dc19647833ec23fc6d7870b2ffb10 (patch) | |
tree | 6c91ad893713069bf399dbbe74a9adc91c1c1daf /include/llvm/CodeGen/Passes.h | |
parent | 78b2961f4dd525da338c976f22cede6253a24369 (diff) | |
download | external_llvm-f7b96311d20dc19647833ec23fc6d7870b2ffb10.zip external_llvm-f7b96311d20dc19647833ec23fc6d7870b2ffb10.tar.gz external_llvm-f7b96311d20dc19647833ec23fc6d7870b2ffb10.tar.bz2 |
Improve TargetPassConfig. No intended functionality.
Split CodeGen into stages.
Distinguish between optimization and correctness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150122 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/Passes.h')
-rw-r--r-- | include/llvm/CodeGen/Passes.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/Passes.h b/include/llvm/CodeGen/Passes.h index 3afb6a7..f2deadb 100644 --- a/include/llvm/CodeGen/Passes.h +++ b/include/llvm/CodeGen/Passes.h @@ -111,6 +111,10 @@ protected: return true; } + /// addMachineSSAOptimization - Add standard passes that optimize machine + /// instructions in SSA form. + virtual void addMachineSSAOptimization(); + /// addPreRegAlloc - This method may be implemented by targets that want to /// run passes immediately before register allocation. This should return /// true if -print-machineinstrs should print after these passes. @@ -118,6 +122,9 @@ protected: return false; } + // addRegAlloc - Add standard passes related to register allocation. + virtual void addRegAlloc(); + /// addPostRegAlloc - This method may be implemented by targets that want /// to run passes after register allocation but before prolog-epilog /// insertion. This should return true if -print-machineinstrs should print @@ -126,6 +133,9 @@ protected: return false; } + /// Add passes that optimize machine instructions after register allocation. + virtual void addMachineLateOptimization(); + /// addPreSched2 - This method may be implemented by targets that want to /// run passes after prolog-epilog insertion and before the second instruction /// scheduling pass. This should return true if -print-machineinstrs should @@ -134,6 +144,9 @@ protected: return false; } + /// Add standard basic block placement passes. + virtual void addBlockPlacement(); + /// addPreEmitPass - This pass may be implemented by targets that want to run /// passes immediately before machine code is emitted. This should return /// true if -print-machineinstrs should print out the code after the passes. |