Matches MachineInstr changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 15 insertions, 14 deletions

diff --git a/include/llvm/CodeGen/MachineInstrBuilder.h b/include/llvm/CodeGen/MachineInstrBuilder.h
index a9e7ffd..1fd9348 100644
--- a/include/llvm/CodeGen/MachineInstrBuilder.h
+++ b/include/llvm/CodeGen/MachineInstrBuilder.h
@@ -18,6 +18,8 @@
 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
 
 #include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/Target/TargetMachine.h"
 
 namespace llvm {
 
@@ -33,8 +35,9 @@ public:
 
   /// addReg - Add a new virtual register operand...
   ///
-  const MachineInstrBuilder &addReg(int RegNo, bool isDef = false,
-                                    bool isImp = false) const {
+  const
+  MachineInstrBuilder &addReg(int RegNo, bool isDef = false, bool isImp = false,
+                              bool isKill = false, bool isDead = false) const {
     MI->addRegOperand(RegNo, isDef, isImp);
     return *this;
   }
@@ -77,28 +80,24 @@ public:
     MI->addExternalSymbolOperand(FnName);
     return *this;
   }
-
-  const MachineInstrBuilder &addImplicitDefsUses() const {
-    MI->addImplicitDefUseOperands();
-    return *this;
-  }
 };
 
 /// BuildMI - Builder interface.  Specify how to create the initial instruction
 /// itself.  NumOperands is the number of operands to the machine instruction to
 /// allow for memory efficient representation of machine instructions.
 ///
-inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands) {
-  return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands));
+inline MachineInstrBuilder BuildMI(const TargetInstrInfo &TII, int Opcode,
+                                   unsigned NumOperands) {
+  return MachineInstrBuilder(new MachineInstr(TII, Opcode, NumOperands));
 }
 
 /// BuildMI - This version of the builder sets up the first operand as a
 /// destination virtual register.  NumOperands is the number of additional add*
 /// calls that are expected, not including the destination register.
 ///
-inline MachineInstrBuilder 
-BuildMI(int Opcode, unsigned NumOperands, unsigned DestReg) {
-  return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1))
+inline MachineInstrBuilder  BuildMI(const TargetInstrInfo &TII, int Opcode,
+                                    unsigned NumOperands, unsigned DestReg) {
+  return MachineInstrBuilder(new MachineInstr(TII, Opcode, NumOperands+1))
                .addReg(DestReg, true);
 }
 
@@ -112,7 +111,8 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
                                    MachineBasicBlock::iterator I,
                                    int Opcode, unsigned NumOperands,
                                    unsigned DestReg) {
-  MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1);
+  MachineInstr *MI = new MachineInstr(*BB.getParent()->getTarget().
+                                      getInstrInfo(), Opcode, NumOperands+1);
   BB.insert(I, MI);
   return MachineInstrBuilder(MI).addReg(DestReg, true);
 }
@@ -124,7 +124,8 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
                                    MachineBasicBlock::iterator I,
                                    int Opcode, unsigned NumOperands) {
-  MachineInstr *MI = new MachineInstr(Opcode, NumOperands);
+  MachineInstr *MI = new MachineInstr(*BB.getParent()->getTarget().
+                                      getInstrInfo(), Opcode, NumOperands);
   BB.insert(I, MI);
   return MachineInstrBuilder(MI);
 }