diff options
| author | Logan Chien <loganchien@google.com> | 2011-07-20 14:35:08 +0800 |
|---|---|---|
| committer | Logan Chien <loganchien@google.com> | 2011-07-20 14:37:02 +0800 |
| commit | ebf5f0962932032481ae306b42c96c68c3a0be95 (patch) | |
| tree | bbb4590c963c577450081053136a90c5bd05c74e /include/llvm/IntrinsicsXCore.td | |
| parent | 46b77918fb8670fbc0a4a6389c5fa0795264c2cb (diff) | |
| parent | e76a33b9567d78a5744dc52fcec3a6056d6fb576 (diff) | |
| download | external_llvm-ebf5f0962932032481ae306b42c96c68c3a0be95.zip external_llvm-ebf5f0962932032481ae306b42c96c68c3a0be95.tar.gz external_llvm-ebf5f0962932032481ae306b42c96c68c3a0be95.tar.bz2 | |
Merge with LLVM upstream r135568 (Jul 20th 2011)
Conflicts:
lib/Bitcode/Reader/BitcodeReader.cpp
Change-Id: Iebed76d2f7d281e742947e31d9a0b78174daf2d6
Diffstat (limited to 'include/llvm/IntrinsicsXCore.td')
| -rw-r--r-- | include/llvm/IntrinsicsXCore.td | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/llvm/IntrinsicsXCore.td b/include/llvm/IntrinsicsXCore.td index a062fc4..93f555d 100644 --- a/include/llvm/IntrinsicsXCore.td +++ b/include/llvm/IntrinsicsXCore.td @@ -17,6 +17,10 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.". def int_xcore_crc32 : Intrinsic<[llvm_i32_ty], [llvm_i32_ty,llvm_i32_ty,llvm_i32_ty], [IntrNoMem]>; + def int_xcore_sext : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], + [IntrNoMem]>; + def int_xcore_zext : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], + [IntrNoMem]>; def int_xcore_getid : Intrinsic<[llvm_i32_ty],[],[IntrNoMem]>; def int_xcore_getps : Intrinsic<[llvm_i32_ty],[llvm_i32_ty]>; def int_xcore_setps : Intrinsic<[],[llvm_i32_ty, llvm_i32_ty]>; @@ -40,6 +44,10 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.". [NoCapture<0>]>; def int_xcore_chkct : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty], [NoCapture<0>]>; + def int_xcore_testct : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty], + [NoCapture<0>]>; + def int_xcore_testwct : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty], + [NoCapture<0>]>; def int_xcore_setd : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty], [NoCapture<0>]>; def int_xcore_setc : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty], @@ -65,6 +73,10 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.". [NoCapture<0>, NoCapture<1>]>; def int_xcore_setpsc : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty], [NoCapture<0>]>; + def int_xcore_peek : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty], + [NoCapture<0>]>; + def int_xcore_endin : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty], + [NoCapture<0>]>; // Intrinsics for events. def int_xcore_waitevent : Intrinsic<[llvm_ptr_ty],[], [IntrReadMem]>; |