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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-05-18 21:10:50 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-05-18 21:10:50 +0000 |
| commit | 64f3a9433186f879b5ab6db10ab1c630cf210be6 (patch) | |
| tree | b3ab75a9761643adb8f6e021deafda1bd8bd941d /include/llvm/MC/MCStreamer.h | |
| parent | a8658317bb2e93e04d2f96887857045ead5a45dd (diff) | |
| download | external_llvm-64f3a9433186f879b5ab6db10ab1c630cf210be6.zip external_llvm-64f3a9433186f879b5ab6db10ab1c630cf210be6.tar.gz external_llvm-64f3a9433186f879b5ab6db10ab1c630cf210be6.tar.bz2 | |
Properly handle multiple definitions of a virtual register in the same
instruction.
This can happen on ARM:
>> %reg1035:5<def>, %reg1035:6<def> = VLD1q16 %reg1028, 0, pred:14, pred:%reg0
Regs: Q0=%reg1032* R0=%reg1028* R1=%reg1029* R2 R3=%reg1031*
Killing last use: %reg1028
Allocating %reg1035 from QPR
Assigning %reg1035 to Q1
<< %D2<def>, %D3<def> = VLD1q16 %R0<kill>, 0, pred:14, pred:%reg0, %Q1<imp-def>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104056 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/MC/MCStreamer.h')
0 files changed, 0 insertions, 0 deletions