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authorJim Grosbach <grosbach@apple.com>2012-03-05 19:33:30 +0000
committerJim Grosbach <grosbach@apple.com>2012-03-05 19:33:30 +0000
commit28f08c93e75d291695ea89b9004145103292e85b (patch)
treebd534c18453b3aa4876d9bafa86b0c1a93ffbefb /include/llvm/MC
parent33ca87affb81b60c4d50214eb7458bd26d397d53 (diff)
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ARM refactor away a bunch of VLD/VST pseudo instructions.
With the new composite physical registers to represent arbitrary pairs of DPR registers, we don't need the pseudo-registers anymore. Get rid of a bunch of them that use DPR register pairs and just use the real instructions directly instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152045 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/MC')
-rw-r--r--include/llvm/MC/MCRegisterInfo.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/llvm/MC/MCRegisterInfo.h b/include/llvm/MC/MCRegisterInfo.h
index 2e5968d..762558d 100644
--- a/include/llvm/MC/MCRegisterInfo.h
+++ b/include/llvm/MC/MCRegisterInfo.h
@@ -252,7 +252,7 @@ public:
/// Reg so its sub-register of index SubIdx is Reg.
unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
const MCRegisterClass *RC) const {
- for (const unsigned *SRs = getSuperRegisters(Reg); unsigned SR = *SRs;++SRs)
+ for (const uint16_t *SRs = getSuperRegisters(Reg); unsigned SR = *SRs;++SRs)
if (Reg == getSubReg(SR, SubIdx) && RC->contains(SR))
return SR;
return 0;