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author | Evan Cheng <evan.cheng@apple.com> | 2006-05-09 06:35:30 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2006-05-09 06:35:30 +0000 |
commit | 696736be8b80fe3946f73605b46359345afdf57a (patch) | |
tree | c3d5ae8de2080f02d24cf26655f81765a6dfd4c0 /include/llvm/Target/MRegisterInfo.h | |
parent | 8d58e6a9be0ced7ad260449e882c5d2dcb5f4990 (diff) | |
download | external_llvm-696736be8b80fe3946f73605b46359345afdf57a.zip external_llvm-696736be8b80fe3946f73605b46359345afdf57a.tar.gz external_llvm-696736be8b80fe3946f73605b46359345afdf57a.tar.bz2 |
Added sub- register classes information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28196 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/Target/MRegisterInfo.h')
-rw-r--r-- | include/llvm/Target/MRegisterInfo.h | 36 |
1 files changed, 29 insertions, 7 deletions
diff --git a/include/llvm/Target/MRegisterInfo.h b/include/llvm/Target/MRegisterInfo.h index 064a1b5..c9d604f 100644 --- a/include/llvm/Target/MRegisterInfo.h +++ b/include/llvm/Target/MRegisterInfo.h @@ -47,14 +47,18 @@ public: typedef const unsigned* const_iterator; typedef const MVT::ValueType* vt_iterator; + typedef const TargetRegisterClass** sc_iterator; private: const vt_iterator VTs; + const sc_iterator SubClasses; const unsigned RegSize, Alignment; // Size & Alignment of register in bytes const iterator RegsBegin, RegsEnd; public: - TargetRegisterClass(const MVT::ValueType *vts, unsigned RS, unsigned Al, - iterator RB, iterator RE) - : VTs(vts), RegSize(RS), Alignment(Al), RegsBegin(RB), RegsEnd(RE) {} + TargetRegisterClass(const MVT::ValueType *vts, + const TargetRegisterClass **scs, + unsigned RS, unsigned Al, iterator RB, iterator RE) + : VTs(vts), SubClasses(scs), + RegSize(RS), Alignment(Al), RegsBegin(RB), RegsEnd(RE) {} virtual ~TargetRegisterClass() {} // Allow subclasses // begin/end - Return all of the registers in this class. @@ -87,20 +91,38 @@ public: return false; } - /// vt_begin - Loop over all of the value types that can be represented by - /// values in this register class. + /// vt_begin / vt_end - Loop over all of the value types that can be + /// represented by values in this register class. vt_iterator vt_begin() const { return VTs; } - /// vt_begin - Loop over all of the value types that can be represented by - /// values in this register class. vt_iterator vt_end() const { vt_iterator I = VTs; while (*I != MVT::Other) ++I; return I; } + + /// hasSubRegClass - return true if the specified TargetRegisterClass is a + /// sub-register class of this TargetRegisterClass. + bool hasSubRegClass(const TargetRegisterClass *cs) const { + for (int i = 0; SubClasses[i] != NULL; ++i) + if (SubClasses[i] == cs) + return true; + return false; + } + + /// subclasses_begin / subclasses_end - Loop over all of the sub-classes of + /// this register class. + sc_iterator subclasses_begin() const { + return SubClasses; + } + sc_iterator subclasses_end() const { + sc_iterator I = SubClasses; + while (*I != NULL) ++I; + return I; + } /// allocation_order_begin/end - These methods define a range of registers /// which specify the registers in this class that are valid to register |