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author | Evan Cheng <evan.cheng@apple.com> | 2006-11-09 02:22:54 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2006-11-09 02:22:54 +0000 |
commit | a1fd6504aaf62b87530e8230517957bad3facc96 (patch) | |
tree | fb88ec42cf63d8dd4e2fe981e9c9feb3763e59d2 /include/llvm/Target/TargetInstrInfo.h | |
parent | dd2b95534f866ec6f31df101624a715612c97ffa (diff) | |
download | external_llvm-a1fd6504aaf62b87530e8230517957bad3facc96.zip external_llvm-a1fd6504aaf62b87530e8230517957bad3facc96.tar.gz external_llvm-a1fd6504aaf62b87530e8230517957bad3facc96.tar.bz2 |
Remove M_2_ADDR_FLAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31583 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/Target/TargetInstrInfo.h')
-rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 20 |
1 files changed, 7 insertions, 13 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 8717d72..db3b813 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -52,37 +52,34 @@ const unsigned M_DELAY_SLOT_FLAG = 1 << 4; const unsigned M_LOAD_FLAG = 1 << 5; const unsigned M_STORE_FLAG = 1 << 6; -// M_2_ADDR_FLAG - 3-addr instructions which really work like 2-addr ones. -const unsigned M_2_ADDR_FLAG = 1 << 7; - -// M_CONVERTIBLE_TO_3_ADDR - This is a M_2_ADDR_FLAG instruction which can be +// M_CONVERTIBLE_TO_3_ADDR - This is a 2-address instruction which can be // changed into a 3-address instruction if the first two operands cannot be // assigned to the same register. The target must implement the // TargetInstrInfo::convertToThreeAddress method for this instruction. -const unsigned M_CONVERTIBLE_TO_3_ADDR = 1 << 8; +const unsigned M_CONVERTIBLE_TO_3_ADDR = 1 << 7; // This M_COMMUTABLE - is a 2- or 3-address instruction (of the form X = op Y, // Z), which produces the same result if Y and Z are exchanged. -const unsigned M_COMMUTABLE = 1 << 9; +const unsigned M_COMMUTABLE = 1 << 8; // M_TERMINATOR_FLAG - Is this instruction part of the terminator for a basic // block? Typically this is things like return and branch instructions. // Various passes use this to insert code into the bottom of a basic block, but // before control flow occurs. -const unsigned M_TERMINATOR_FLAG = 1 << 10; +const unsigned M_TERMINATOR_FLAG = 1 << 9; // M_USES_CUSTOM_DAG_SCHED_INSERTION - Set if this instruction requires custom // insertion support when the DAG scheduler is inserting it into a machine basic // block. -const unsigned M_USES_CUSTOM_DAG_SCHED_INSERTION = 1 << 11; +const unsigned M_USES_CUSTOM_DAG_SCHED_INSERTION = 1 << 10; // M_VARIABLE_OPS - Set if this instruction can have a variable number of extra // operands in addition to the minimum number operands specified. -const unsigned M_VARIABLE_OPS = 1 << 12; +const unsigned M_VARIABLE_OPS = 1 << 11; // M_PREDICATED - Set if this instruction has a predicate that controls its // execution. -const unsigned M_PREDICATED = 1 << 13; +const unsigned M_PREDICATED = 1 << 12; // Machine operand flags @@ -184,9 +181,6 @@ public: return get(Opcode).Flags & M_RET_FLAG; } - bool isTwoAddrInstr(MachineOpCode Opcode) const { - return get(Opcode).Flags & M_2_ADDR_FLAG; - } bool isPredicated(MachineOpCode Opcode) const { return get(Opcode).Flags & M_PREDICATED; } |