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author | Dan Gohman <gohman@apple.com> | 2009-01-29 01:59:02 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2009-01-29 01:59:02 +0000 |
commit | e5af2d3a224d4b38760a26d237cde040cb6e14eb (patch) | |
tree | 8ef65dfe14fd2541c8d0785d1ce6855abfd876b4 /include/llvm/Target/TargetLowering.h | |
parent | 63e3e6350b14d04917268be07ca1c29e158fdfd7 (diff) | |
download | external_llvm-e5af2d3a224d4b38760a26d237cde040cb6e14eb.zip external_llvm-e5af2d3a224d4b38760a26d237cde040cb6e14eb.tar.gz external_llvm-e5af2d3a224d4b38760a26d237cde040cb6e14eb.tar.bz2 |
Make x86's BT instruction matching more thorough, and add some
dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/Target/TargetLowering.h')
-rw-r--r-- | include/llvm/Target/TargetLowering.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index e6f18ea..4ec7d3f 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -780,6 +780,8 @@ public: SDValue CombineTo(SDNode *N, const std::vector<SDValue> &To); SDValue CombineTo(SDNode *N, SDValue Res); SDValue CombineTo(SDNode *N, SDValue Res0, SDValue Res1); + + void CommitTargetLoweringOpt(const TargetLoweringOpt &TLO); }; /// SimplifySetCC - Try to simplify a setcc built with the specified operands |