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author | Dale Johannesen <dalej@apple.com> | 2007-08-30 00:23:21 +0000 |
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committer | Dale Johannesen <dalej@apple.com> | 2007-08-30 00:23:21 +0000 |
commit | f04afdbb48568ef09f11fd10ac03426101f2dbf8 (patch) | |
tree | df18d3207060fa0327a208f95cf643e386a3de7d /include/llvm/Target/TargetLowering.h | |
parent | 055c5449a4046a5e1a5210d2f91aee4e3901cccf (diff) | |
download | external_llvm-f04afdbb48568ef09f11fd10ac03426101f2dbf8.zip external_llvm-f04afdbb48568ef09f11fd10ac03426101f2dbf8.tar.gz external_llvm-f04afdbb48568ef09f11fd10ac03426101f2dbf8.tar.bz2 |
Change LegalFPImmediates to use APFloat.
Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to use APFloat interface in
ConstantFPSDNode uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41587 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/Target/TargetLowering.h')
-rw-r--r-- | include/llvm/Target/TargetLowering.h | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index ed97a93..f2f5bba 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -24,6 +24,7 @@ #include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/CodeGen/RuntimeLibcalls.h" +#include "llvm/ADT/APFloat.h" #include <map> #include <vector> @@ -220,7 +221,7 @@ public: unsigned &NumIntermediates, MVT::ValueType &RegisterVT) const; - typedef std::vector<double>::const_iterator legal_fpimm_iterator; + typedef std::vector<APFloat>::const_iterator legal_fpimm_iterator; legal_fpimm_iterator legal_fpimm_begin() const { return LegalFPImmediates.begin(); } @@ -781,8 +782,18 @@ protected: /// addLegalFPImmediate - Indicate that this target can instruction select /// the specified FP immediate natively. - void addLegalFPImmediate(double Imm) { + void addLegalFPImmediate(const APFloat& Imm) { + // Incoming constants are expected to be double. We also add + // the float version. It is expected that all constants are exactly + // representable as floats. + assert(&Imm.getSemantics() == &APFloat::IEEEdouble); + APFloat Immf = APFloat(Imm); + // Rounding mode is not supposed to matter here... + if (Immf.convert(APFloat::IEEEsingle, APFloat::rmNearestTiesToEven) != + APFloat::opOK) + assert(0); LegalFPImmediates.push_back(Imm); + LegalFPImmediates.push_back(Immf); } /// setTargetDAGCombine - Targets should invoke this method for each target @@ -1118,7 +1129,7 @@ private: ValueTypeActionImpl ValueTypeActions; - std::vector<double> LegalFPImmediates; + std::vector<APFloat> LegalFPImmediates; std::vector<std::pair<MVT::ValueType, TargetRegisterClass*> > AvailableRegClasses; |