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authorJakob Stoklund Olesen <stoklund@2pi.dk>2010-07-11 17:01:17 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2010-07-11 17:01:17 +0000
commit744b3a5acdbd4d0fac9c6a7c9ad702502cc3cc37 (patch)
treed58ebbf7972f8977452bd3ef5b85fb71b9c78d6a /include/llvm/Target
parentd6d7abaf4ebbabb850aa9c20e1617f897608fe62 (diff)
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Remove TargetInstrInfo::copyRegToReg entirely.
Targets must now implement TargetInstrInfo::copyPhysReg instead. There is no longer a default implementation forwarding to copyRegToReg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108095 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/Target')
-rw-r--r--include/llvm/Target/TargetInstrInfo.h20
-rw-r--r--include/llvm/Target/TargetOpcodes.h3
2 files changed, 4 insertions, 19 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 6a4573b..6e69914 100644
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -357,7 +357,9 @@ public:
virtual void copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, DebugLoc DL,
unsigned DestReg, unsigned SrcReg,
- bool KillSrc) const =0;
+ bool KillSrc) const {
+ assert(0 && "Target didn't implement TargetInstrInfo::copyPhysReg!");
+ }
/// storeRegToStackSlot - Store the specified register of the given register
/// class to the specified stack frame index. The store instruction is to be
@@ -648,22 +650,6 @@ public:
virtual ScheduleHazardRecognizer *
CreateTargetPostRAHazardRecognizer(const InstrItineraryData&) const;
- virtual void copyPhysReg(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MI, DebugLoc DL,
- unsigned DestReg, unsigned SrcReg,
- bool KillSrc) const;
- /// copyRegToReg - Legacy hook going away soon. Targets should implement
- /// copyPhysReg instead.
- virtual bool copyRegToReg(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MI,
- unsigned DestReg, unsigned SrcReg,
- const TargetRegisterClass *DestRC,
- const TargetRegisterClass *SrcRC,
- DebugLoc DL) const {
- assert(0 && "Target didn't implement TargetInstrInfo::copyPhysReg!");
- return false;
- }
-
};
} // End llvm namespace
diff --git a/include/llvm/Target/TargetOpcodes.h b/include/llvm/Target/TargetOpcodes.h
index e710c70..cb772ec 100644
--- a/include/llvm/Target/TargetOpcodes.h
+++ b/include/llvm/Target/TargetOpcodes.h
@@ -62,8 +62,7 @@ namespace TargetOpcode {
/// used between instruction selection and MachineInstr creation, before
/// virtual registers have been created for all the instructions, and it's
/// only needed in cases where the register classes implied by the
- /// instructions are insufficient. The actual MachineInstrs to perform
- /// the copy are emitted with the TargetInstrInfo::copyRegToReg hook.
+ /// instructions are insufficient. It is emitted as a COPY MachineInstr.
COPY_TO_REGCLASS = 10,
/// DBG_VALUE - a mapping of the llvm.dbg.value intrinsic