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| author | Dale Johannesen <dalej@apple.com> | 2009-06-02 03:12:52 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2009-06-02 03:12:52 +0000 |
| commit | 874ae251c317788391f9c3f113957802d390a063 (patch) | |
| tree | 4d5ee801f6b36ff51fbd06090212d02c4405b1c6 /include/llvm/Target | |
| parent | 5d16396a33bfaa76da99c97c526a737af9618d05 (diff) | |
| download | external_llvm-874ae251c317788391f9c3f113957802d390a063.zip external_llvm-874ae251c317788391f9c3f113957802d390a063.tar.gz external_llvm-874ae251c317788391f9c3f113957802d390a063.tar.bz2 | |
Revert 72707 and 72709, for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72712 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/Target')
| -rw-r--r-- | include/llvm/Target/Target.td | 5 | ||||
| -rw-r--r-- | include/llvm/Target/TargetSelectionDAG.td | 10 |
2 files changed, 4 insertions, 11 deletions
diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td index 4af1089..3f1cdd2 100644 --- a/include/llvm/Target/Target.td +++ b/include/llvm/Target/Target.td @@ -326,11 +326,6 @@ class InstrInfo { // Sparc manual specifies its instructions in the format [31..0] (big), while // PowerPC specifies them using the format [0..31] (little). bit isLittleEndianEncoding = 0; - - // Targets that can support the HasI1 argument on ADDC and ADDE, rather than - // Flag, have this bit set. This is transitional and should go away when all - // targets have been switched over. - bit supportsHasI1 = 0; } // Standard Instructions. diff --git a/include/llvm/Target/TargetSelectionDAG.td b/include/llvm/Target/TargetSelectionDAG.td index 2586e65..2cd2967 100644 --- a/include/llvm/Target/TargetSelectionDAG.td +++ b/include/llvm/Target/TargetSelectionDAG.td @@ -216,8 +216,6 @@ def SDNPMayStore : SDNodeProperty; // May write to memory, sets 'mayStore'. def SDNPMayLoad : SDNodeProperty; // May read memory, sets 'mayLoad'. def SDNPSideEffect : SDNodeProperty; // Sets 'HasUnmodelledSideEffects'. def SDNPMemOperand : SDNodeProperty; // Touches memory, has assoc MemOperand -def SDNPInI1 : SDNodeProperty; // Read an extra I1 operand -def SDNPOutI1 : SDNodeProperty; // Write an extra I1 result //===----------------------------------------------------------------------===// // Selection DAG Node definitions. @@ -291,13 +289,13 @@ def or : SDNode<"ISD::OR" , SDTIntBinOp, def xor : SDNode<"ISD::XOR" , SDTIntBinOp, [SDNPCommutative, SDNPAssociative]>; def addc : SDNode<"ISD::ADDC" , SDTIntBinOp, - [SDNPCommutative, SDNPOutI1]>; + [SDNPCommutative, SDNPOutFlag]>; def adde : SDNode<"ISD::ADDE" , SDTIntBinOp, - [SDNPCommutative, SDNPInI1, SDNPOutI1]>; + [SDNPCommutative, SDNPOutFlag, SDNPInFlag]>; def subc : SDNode<"ISD::SUBC" , SDTIntBinOp, - [SDNPOutI1]>; + [SDNPOutFlag]>; def sube : SDNode<"ISD::SUBE" , SDTIntBinOp, - [SDNPInI1, SDNPOutI1]>; + [SDNPOutFlag, SDNPInFlag]>; def sext_inreg : SDNode<"ISD::SIGN_EXTEND_INREG", SDTExtInreg>; def bswap : SDNode<"ISD::BSWAP" , SDTIntUnaryOp>; |