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authorRuchira Sasanka <sasanka@students.uiuc.edu>2001-09-14 20:31:39 +0000
committerRuchira Sasanka <sasanka@students.uiuc.edu>2001-09-14 20:31:39 +0000
commit94d86e9677c863a10741b888177085fe2d48d50c (patch)
tree1bf8ce65afd4e4bda4b6bdf348617fce04e5fef7 /include/llvm/Target
parentf24ce2a600fc3855258aaf8c3ee8f3b0560f8da6 (diff)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@579 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/Target')
-rw-r--r--include/llvm/Target/RegInfo.h134
1 files changed, 132 insertions, 2 deletions
diff --git a/include/llvm/Target/RegInfo.h b/include/llvm/Target/RegInfo.h
index bb1b029..ec2289a 100644
--- a/include/llvm/Target/RegInfo.h
+++ b/include/llvm/Target/RegInfo.h
@@ -12,6 +12,133 @@
#include <hash_map>
#include <string>
+class IGNode;
+class Value;
+class LiveRangeInfo;
+class Method;
+class Instruction;
+class LiveRange;
+class AddedInstrns;
+class MachineInstr;
+
+
+//-----------------------------------------------------------------------------
+// class MachineRegClassInfo
+//
+// Purpose:
+// Interface to description of machine register class (e.g., int reg class
+// float reg class etc)
+//
+//--------------------------------------------------------------------------
+
+
+class MachineRegClassInfo {
+
+protected:
+
+ const unsigned RegClassID; // integer ID of a reg class
+ const unsigned NumOfAvailRegs; // # of avail for coloring -without SP etc.
+ const unsigned NumOfAllRegs; // # of all registers -including SP,g0 etc.
+
+public:
+
+ inline unsigned getRegClassID() const { return RegClassID; }
+ inline unsigned getNumOfAvailRegs() const { return NumOfAvailRegs; }
+ inline unsigned getNumOfAllRegs() const { return NumOfAllRegs; }
+
+
+
+ // This method should find a color which is not used by neighbors
+ // (i.e., a false position in IsColorUsedArr) and
+ virtual void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const = 0;
+
+
+ MachineRegClassInfo(const unsigned ID, const unsigned NVR,
+ const unsigned NAR): RegClassID(ID), NumOfAvailRegs(NVR),
+ NumOfAllRegs(NAR)
+ { } // empty constructor
+
+};
+
+
+
+
+//---------------------------------------------------------------------------
+// class MachineRegInfo
+//
+// Purpose:
+// Interface to register info of target machine
+//
+//--------------------------------------------------------------------------
+
+
+
+typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
+
+// A vector of all machine register classes
+typedef vector<const MachineRegClassInfo *> MachineRegClassArrayType;
+
+
+class MachineRegInfo : public NonCopyableV {
+
+protected:
+
+ MachineRegClassArrayType MachineRegClassArr;
+
+
+public:
+
+
+ // According the definition of a MachineOperand class, a Value in a
+ // machine instruction can go into either a normal register or a
+ // condition code register. If isCCReg is true below, the ID of the condition
+ // code regiter class will be returned. Otherwise, the normal register
+ // class (eg. int, float) must be returned.
+ virtual unsigned getRegClassIDOfValue (const Value *const Val,
+ bool isCCReg = false) const =0;
+
+
+ inline unsigned int getNumOfRegClasses() const {
+ return MachineRegClassArr.size();
+ }
+
+ const MachineRegClassInfo *const getMachineRegClass(unsigned i) const {
+ return MachineRegClassArr[i];
+ }
+
+
+
+ //virtual unsigned getRegClassIDOfValue (const Value *const Val) const = 0;
+ // this method must give the exact register class of a machine operand
+ // e.g, Int, Float, Int CC, Float CC
+ //virtual unsigned getRCIDOfMachineOp (const MachineOperand &MO) const = 0;
+
+
+ virtual void colorArgs(const Method *const Meth,
+ LiveRangeInfo & LRI) const = 0;
+
+ virtual void colorCallArgs(vector<const Instruction *> & CallInstrList,
+ LiveRangeInfo& LRI,
+ AddedInstrMapType& AddedInstrMap ) const = 0 ;
+
+ virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0;
+
+ virtual const string getUnifiedRegName(int UnifiedRegNum) const = 0;
+
+ //virtual void printReg(const LiveRange *const LR) const =0;
+
+ MachineRegInfo() { }
+
+};
+
+
+
+
+
+
+
+#if 0
+
class Value;
class Instruction;
class Method;
@@ -64,8 +191,7 @@ public:
typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
-// A vector of all machine register classes
-typedef vector<const MachineRegClassInfo *> MachineRegClassArrayType;
+// A vector of all machine register classestypedef vector<const MachineRegClassInfo *> MachineRegClassArrayType;
class MachineRegInfo : public NonCopyableV {
@@ -102,3 +228,7 @@ public:
};
#endif
+
+
+
+#endif