diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2007-09-28 22:32:30 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-09-28 22:32:30 +0000 |
| commit | 22a529990bb4bb86bdb2ae1cfce7340320a6ca7f (patch) | |
| tree | 4b90d4a3ce6d71c913551eaf37ea87e466da2dc5 /include/llvm | |
| parent | 6745458195d6a70381cf84cb4da0bfe2356351a6 (diff) | |
| download | external_llvm-22a529990bb4bb86bdb2ae1cfce7340320a6ca7f.zip external_llvm-22a529990bb4bb86bdb2ae1cfce7340320a6ca7f.tar.gz external_llvm-22a529990bb4bb86bdb2ae1cfce7340320a6ca7f.tar.bz2 | |
If two instructions are both two-address code, favors (schedule closer to
terminator) the one that has a CopyToReg use. This fixes
2006-05-11-InstrSched.ll with -new-cc-modeling-scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42453 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm')
| -rw-r--r-- | include/llvm/CodeGen/ScheduleDAG.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h index cb95c21..9b5724b 100644 --- a/include/llvm/CodeGen/ScheduleDAG.h +++ b/include/llvm/CodeGen/ScheduleDAG.h @@ -115,7 +115,7 @@ namespace llvm { short NumSuccsLeft; // # of succs not scheduled. bool isTwoAddress : 1; // Is a two-address instruction. bool isCommutable : 1; // Is a commutable instruction. - bool hasImplicitDefs : 1; // Has implicit physical reg defs. + bool hasPhysRegDefs : 1; // Has physreg defs that are being used. bool isPending : 1; // True once pending. bool isAvailable : 1; // True once available. bool isScheduled : 1; // True once scheduled. @@ -129,7 +129,7 @@ namespace llvm { SUnit(SDNode *node, unsigned nodenum) : Node(node), InstanceNo(0), NodeNum(nodenum), Latency(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), NumSuccsLeft(0), - isTwoAddress(false), isCommutable(false), hasImplicitDefs(false), + isTwoAddress(false), isCommutable(false), hasPhysRegDefs(false), isPending(false), isAvailable(false), isScheduled(false), CycleBound(0), Cycle(0), Depth(0), Height(0), CopyDstRC(NULL), CopySrcRC(NULL) {} |