diff options
| author | Stephen Hines <srhines@google.com> | 2012-08-23 19:08:53 -0700 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2012-08-23 19:08:53 -0700 |
| commit | 31675153bd2d7617db8cb6aeb58054934c7b9f73 (patch) | |
| tree | c1970fcebc736d4f731db0559a79a7ac5cb0f8bf /include/llvm | |
| parent | 416bb6a168a9316547db6ce3909c515f70a84f52 (diff) | |
| parent | 75dd7f0c4a2b3fb9e9d4d5a0517591810c57ed92 (diff) | |
| download | external_llvm-31675153bd2d7617db8cb6aeb58054934c7b9f73.zip external_llvm-31675153bd2d7617db8cb6aeb58054934c7b9f73.tar.gz external_llvm-31675153bd2d7617db8cb6aeb58054934c7b9f73.tar.bz2 | |
Merge branch 'upstream' into merge_2
Conflicts:
lib/Target/ARM/ARMCodeEmitter.cpp
Change-Id: I6702d340c733e9721499b5d85b13b96ad9c14eb5
Diffstat (limited to 'include/llvm')
70 files changed, 1494 insertions, 626 deletions
diff --git a/include/llvm/ADT/APFloat.h b/include/llvm/ADT/APFloat.h index 2b466f9..5a625a4 100644 --- a/include/llvm/ADT/APFloat.h +++ b/include/llvm/ADT/APFloat.h @@ -274,6 +274,7 @@ namespace llvm { /* C fmod, or llvm frem. */ opStatus mod(const APFloat &, roundingMode); opStatus fusedMultiplyAdd(const APFloat &, const APFloat &, roundingMode); + opStatus roundToIntegral(roundingMode); /* Sign operations. */ void changeSign(); diff --git a/include/llvm/ADT/APInt.h b/include/llvm/ADT/APInt.h index 9498ef0..f30a6e3 100644 --- a/include/llvm/ADT/APInt.h +++ b/include/llvm/ADT/APInt.h @@ -357,13 +357,7 @@ public: /// @brief Check if this APInt has an N-bits unsigned integer value. bool isIntN(unsigned N) const { assert(N && "N == 0 ???"); - if (N >= getBitWidth()) - return true; - - if (isSingleWord()) - return isUIntN(N, VAL); - return APInt(N, makeArrayRef(pVal, getNumWords())).zext(getBitWidth()) - == (*this); + return getActiveBits() <= N; } /// @brief Check if this APInt has an N-bits signed integer value. diff --git a/include/llvm/ADT/DenseMap.h b/include/llvm/ADT/DenseMap.h index d502be6..f60d688 100644 --- a/include/llvm/ADT/DenseMap.h +++ b/include/llvm/ADT/DenseMap.h @@ -617,8 +617,9 @@ public: this->destroyAll(); // Reduce the number of buckets. - unsigned NewNumBuckets - = std::max(64, 1 << (Log2_32_Ceil(OldNumEntries) + 1)); + unsigned NewNumBuckets = 0; + if (OldNumEntries) + NewNumBuckets = std::max(64, 1 << (Log2_32_Ceil(OldNumEntries) + 1)); if (NewNumBuckets == NumBuckets) { this->BaseT::initEmpty(); return; @@ -686,8 +687,7 @@ class SmallDenseMap /// A "union" of an inline bucket array and the struct representing /// a large bucket. This union will be discriminated by the 'Small' bit. - typename AlignedCharArray<BucketT[InlineBuckets], LargeRep>::union_type - storage; + AlignedCharArrayUnion<BucketT[InlineBuckets], LargeRep> storage; public: explicit SmallDenseMap(unsigned NumInitBuckets = 0) { @@ -833,8 +833,7 @@ public: return; // Nothing to do. // First move the inline buckets into a temporary storage. - typename AlignedCharArray<BucketT[InlineBuckets]>::union_type - TmpStorage; + AlignedCharArrayUnion<BucketT[InlineBuckets]> TmpStorage; BucketT *TmpBegin = reinterpret_cast<BucketT *>(TmpStorage.buffer); BucketT *TmpEnd = TmpBegin; diff --git a/include/llvm/ADT/IntrusiveRefCntPtr.h b/include/llvm/ADT/IntrusiveRefCntPtr.h index 0c02a8f..a9724ee 100644 --- a/include/llvm/ADT/IntrusiveRefCntPtr.h +++ b/include/llvm/ADT/IntrusiveRefCntPtr.h @@ -34,7 +34,7 @@ namespace llvm { /// RefCountedBase - A generic base class for objects that wish to /// have their lifetimes managed using reference counts. Classes /// subclass RefCountedBase to obtain such functionality, and are -/// typically handled with IntrusivePtr "smart pointers" (see below) +/// typically handled with IntrusiveRefCntPtr "smart pointers" (see below) /// which automatically handle the management of reference counts. /// Objects that subclass RefCountedBase should not be allocated on /// the stack, as invoking "delete" (which is called when the diff --git a/include/llvm/ADT/SmallVector.h b/include/llvm/ADT/SmallVector.h index d124091..9fbbbe4 100644 --- a/include/llvm/ADT/SmallVector.h +++ b/include/llvm/ADT/SmallVector.h @@ -463,6 +463,9 @@ public: } iterator erase(iterator I) { + assert(I >= this->begin() && "Iterator to erase is out of bounds."); + assert(I < this->end() && "Erasing at past-the-end iterator."); + iterator N = I; // Shift all elts down one. this->move(I+1, this->end(), I); @@ -472,6 +475,10 @@ public: } iterator erase(iterator S, iterator E) { + assert(S >= this->begin() && "Range to erase is out of bounds."); + assert(S <= E && "Trying to erase invalid range."); + assert(E <= this->end() && "Trying to erase past the end."); + iterator N = S; // Shift all elts down. iterator I = this->move(E, this->end(), S); @@ -488,6 +495,9 @@ public: return this->end()-1; } + assert(I >= this->begin() && "Insertion iterator is out of bounds."); + assert(I <= this->end() && "Inserting past the end of the vector."); + if (this->EndX < this->CapacityX) { Retry: ::new ((void*) this->end()) T(::std::move(this->back())); @@ -517,6 +527,9 @@ public: return this->end()-1; } + assert(I >= this->begin() && "Insertion iterator is out of bounds."); + assert(I <= this->end() && "Inserting past the end of the vector."); + if (this->EndX < this->CapacityX) { Retry: ::new ((void*) this->end()) T(this->back()); @@ -548,6 +561,9 @@ public: return this->begin()+InsertElt; } + assert(I >= this->begin() && "Insertion iterator is out of bounds."); + assert(I <= this->end() && "Inserting past the end of the vector."); + // Ensure there is enough space. reserve(static_cast<unsigned>(this->size() + NumToInsert)); @@ -596,6 +612,9 @@ public: return this->begin()+InsertElt; } + assert(I >= this->begin() && "Insertion iterator is out of bounds."); + assert(I <= this->end() && "Inserting past the end of the vector."); + size_t NumToInsert = std::distance(From, To); // Ensure there is enough space. @@ -899,7 +918,8 @@ public: template <typename T> class SmallVector<T,0> : public SmallVectorImpl<T> { public: - SmallVector() : SmallVectorImpl<T>(0) {} + SmallVector() : SmallVectorImpl<T>(0) { + } explicit SmallVector(unsigned Size, const T &Value = T()) : SmallVectorImpl<T>(0) { @@ -912,13 +932,26 @@ public: } SmallVector(const SmallVector &RHS) : SmallVectorImpl<T>(0) { + if (!RHS.empty()) + SmallVectorImpl<T>::operator=(RHS); + } + + const SmallVector &operator=(const SmallVector &RHS) { SmallVectorImpl<T>::operator=(RHS); + return *this; } - SmallVector &operator=(const SmallVectorImpl<T> &RHS) { - return SmallVectorImpl<T>::operator=(RHS); +#if LLVM_USE_RVALUE_REFERENCES + SmallVector(SmallVector &&RHS) : SmallVectorImpl<T>(0) { + if (!RHS.empty()) + SmallVectorImpl<T>::operator=(::std::move(RHS)); } + const SmallVector &operator=(SmallVector &&RHS) { + SmallVectorImpl<T>::operator=(::std::move(RHS)); + return *this; + } +#endif }; template<typename T, unsigned N> diff --git a/include/llvm/ADT/StringRef.h b/include/llvm/ADT/StringRef.h index 1779bcb..cd84603 100644 --- a/include/llvm/ADT/StringRef.h +++ b/include/llvm/ADT/StringRef.h @@ -12,6 +12,7 @@ #include "llvm/Support/type_traits.h" +#include <algorithm> #include <cassert> #include <cstring> #include <limits> diff --git a/include/llvm/ADT/StringSwitch.h b/include/llvm/ADT/StringSwitch.h index 7480583..7fd6e27 100644 --- a/include/llvm/ADT/StringSwitch.h +++ b/include/llvm/ADT/StringSwitch.h @@ -48,8 +48,8 @@ class StringSwitch { const T *Result; public: - explicit StringSwitch(StringRef Str) - : Str(Str), Result(0) { } + explicit StringSwitch(StringRef S) + : Str(S), Result(0) { } template<unsigned N> StringSwitch& Case(const char (&S)[N], const T& Value) { diff --git a/include/llvm/ADT/TinyPtrVector.h b/include/llvm/ADT/TinyPtrVector.h index 8f3925c..d3d33b8 100644 --- a/include/llvm/ADT/TinyPtrVector.h +++ b/include/llvm/ADT/TinyPtrVector.h @@ -11,8 +11,9 @@ #define LLVM_ADT_TINYPTRVECTOR_H #include "llvm/ADT/ArrayRef.h" -#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/PointerUnion.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/Support/Compiler.h" namespace llvm { @@ -27,23 +28,78 @@ template <typename EltTy> class TinyPtrVector { public: typedef llvm::SmallVector<EltTy, 4> VecTy; + typedef typename VecTy::value_type value_type; + llvm::PointerUnion<EltTy, VecTy*> Val; - + TinyPtrVector() {} + ~TinyPtrVector() { + if (VecTy *V = Val.template dyn_cast<VecTy*>()) + delete V; + } + TinyPtrVector(const TinyPtrVector &RHS) : Val(RHS.Val) { if (VecTy *V = Val.template dyn_cast<VecTy*>()) Val = new VecTy(*V); } + TinyPtrVector &operator=(const TinyPtrVector &RHS) { + if (this == &RHS) + return *this; + if (RHS.empty()) { + this->clear(); + return *this; + } + + // Try to squeeze into the single slot. If it won't fit, allocate a copied + // vector. + if (Val.template is<EltTy>()) { + if (RHS.size() == 1) + Val = RHS.front(); + else + Val = new VecTy(*RHS.Val.template get<VecTy*>()); + return *this; + } + + // If we have a full vector allocated, try to re-use it. + if (RHS.Val.template is<EltTy>()) { + Val.template get<VecTy*>()->clear(); + Val.template get<VecTy*>()->push_back(RHS.front()); + } else { + *Val.template get<VecTy*>() = *RHS.Val.template get<VecTy*>(); + } + return *this; + } + #if LLVM_USE_RVALUE_REFERENCES TinyPtrVector(TinyPtrVector &&RHS) : Val(RHS.Val) { RHS.Val = (EltTy)0; } -#endif - ~TinyPtrVector() { - if (VecTy *V = Val.template dyn_cast<VecTy*>()) + TinyPtrVector &operator=(TinyPtrVector &&RHS) { + if (this == &RHS) + return *this; + if (RHS.empty()) { + this->clear(); + return *this; + } + + // If this vector has been allocated on the heap, re-use it if cheap. If it + // would require more copying, just delete it and we'll steal the other + // side. + if (VecTy *V = Val.template dyn_cast<VecTy*>()) { + if (RHS.Val.template is<EltTy>()) { + V->clear(); + V->push_back(RHS.front()); + return *this; + } delete V; + } + + Val = RHS.Val; + RHS.Val = (EltTy)0; + return *this; } - +#endif + // implicit conversion operator to ArrayRef. operator ArrayRef<EltTy>() const { if (Val.isNull()) @@ -52,7 +108,7 @@ public: return *Val.getAddrOfPtr1(); return *Val.template get<VecTy*>(); } - + bool empty() const { // This vector can be empty if it contains no element, or if it // contains a pointer to an empty vector. @@ -61,7 +117,7 @@ public: return Vec->empty(); return false; } - + unsigned size() const { if (empty()) return 0; @@ -69,27 +125,21 @@ public: return 1; return Val.template get<VecTy*>()->size(); } - + typedef const EltTy *const_iterator; typedef EltTy *iterator; iterator begin() { - if (empty()) - return 0; - if (Val.template is<EltTy>()) return Val.getAddrOfPtr1(); - + return Val.template get<VecTy *>()->begin(); } iterator end() { - if (empty()) - return 0; - if (Val.template is<EltTy>()) - return begin() + 1; - + return begin() + (Val.isNull() ? 0 : 1); + return Val.template get<VecTy *>()->end(); } @@ -107,19 +157,19 @@ public: assert(i == 0 && "tinyvector index out of range"); return V; } - - assert(i < Val.template get<VecTy*>()->size() && + + assert(i < Val.template get<VecTy*>()->size() && "tinyvector index out of range"); return (*Val.template get<VecTy*>())[i]; } - + EltTy front() const { assert(!empty() && "vector empty"); if (EltTy V = Val.template dyn_cast<EltTy>()) return V; return Val.template get<VecTy*>()->front(); } - + EltTy back() const { assert(!empty() && "vector empty"); if (EltTy V = Val.template dyn_cast<EltTy>()) @@ -127,26 +177,25 @@ public: return Val.template get<VecTy*>()->back(); } - void push_back(EltTy NewVal) { assert(NewVal != 0 && "Can't add a null value"); - + // If we have nothing, add something. if (Val.isNull()) { Val = NewVal; return; } - + // If we have a single value, convert to a vector. if (EltTy V = Val.template dyn_cast<EltTy>()) { Val = new VecTy(); Val.template get<VecTy*>()->push_back(V); } - + // Add the new value, we know we have a vector. Val.template get<VecTy*>()->push_back(NewVal); } - + void pop_back() { // If we have a single value, convert to empty. if (Val.template is<EltTy>()) @@ -155,7 +204,6 @@ public: Vec->pop_back(); } - void clear() { // If we have a single value, convert to empty. if (Val.template is<EltTy>()) { @@ -168,6 +216,9 @@ public: } iterator erase(iterator I) { + assert(I >= begin() && "Iterator to erase is out of bounds."); + assert(I < end() && "Erasing at past-the-end iterator."); + // If we have a single value, convert to empty. if (Val.template is<EltTy>()) { if (I == begin()) @@ -177,15 +228,63 @@ public: // benefit to collapsing back to a pointer return Vec->erase(I); } + return end(); + } - return 0; + iterator erase(iterator S, iterator E) { + assert(S >= begin() && "Range to erase is out of bounds."); + assert(S <= E && "Trying to erase invalid range."); + assert(E <= end() && "Trying to erase past the end."); + + if (Val.template is<EltTy>()) { + if (S == begin() && S != E) + Val = (EltTy)0; + } else if (VecTy *Vec = Val.template dyn_cast<VecTy*>()) { + return Vec->erase(S, E); + } + return end(); + } + + iterator insert(iterator I, const EltTy &Elt) { + assert(I >= this->begin() && "Insertion iterator is out of bounds."); + assert(I <= this->end() && "Inserting past the end of the vector."); + if (I == end()) { + push_back(Elt); + return llvm::prior(end()); + } + assert(!Val.isNull() && "Null value with non-end insert iterator."); + if (EltTy V = Val.template dyn_cast<EltTy>()) { + assert(I == begin()); + Val = Elt; + push_back(V); + return begin(); + } + + return Val.template get<VecTy*>()->insert(I, Elt); + } + + template<typename ItTy> + iterator insert(iterator I, ItTy From, ItTy To) { + assert(I >= this->begin() && "Insertion iterator is out of bounds."); + assert(I <= this->end() && "Inserting past the end of the vector."); + if (From == To) + return I; + + // If we have a single value, convert to a vector. + ptrdiff_t Offset = I - begin(); + if (Val.isNull()) { + if (llvm::next(From) == To) { + Val = *From; + return begin(); + } + + Val = new VecTy(); + } else if (EltTy V = Val.template dyn_cast<EltTy>()) { + Val = new VecTy(); + Val.template get<VecTy*>()->push_back(V); + } + return Val.template get<VecTy*>()->insert(begin() + Offset, From, To); } - -private: - void operator=(const TinyPtrVector&); // NOT IMPLEMENTED YET. -#if LLVM_USE_RVALUE_REFERENCES - void operator=(TinyPtrVector&&); // NOT IMPLEMENTED YET. -#endif }; } // end namespace llvm diff --git a/include/llvm/ADT/Triple.h b/include/llvm/ADT/Triple.h index a080200..7f7061a 100644 --- a/include/llvm/ADT/Triple.h +++ b/include/llvm/ADT/Triple.h @@ -98,7 +98,8 @@ public: Minix, RTEMS, NativeClient, - CNK // BG/P Compute-Node Kernel + CNK, // BG/P Compute-Node Kernel + Bitrig }; enum EnvironmentType { UnknownEnvironment, diff --git a/include/llvm/ADT/VariadicFunction.h b/include/llvm/ADT/VariadicFunction.h index a9a0dc6..a7f83a6 100644 --- a/include/llvm/ADT/VariadicFunction.h +++ b/include/llvm/ADT/VariadicFunction.h @@ -206,7 +206,7 @@ struct VariadicFunction2 { ResultT operator()(Param0T P0, Param1T P1, \ LLVM_COMMA_JOIN ## N(const ArgT &A)) const { \ const ArgT *const Args[] = { LLVM_COMMA_JOIN ## N(&A) }; \ - return Func(P0, P1, makeAraryRef(Args)); \ + return Func(P0, P1, makeArrayRef(Args)); \ } LLVM_DEFINE_OVERLOAD(1) LLVM_DEFINE_OVERLOAD(2) diff --git a/include/llvm/Analysis/BranchProbabilityInfo.h b/include/llvm/Analysis/BranchProbabilityInfo.h index 2ced796..006daa0 100644 --- a/include/llvm/Analysis/BranchProbabilityInfo.h +++ b/include/llvm/Analysis/BranchProbabilityInfo.h @@ -122,6 +122,7 @@ private: bool calcLoopBranchHeuristics(BasicBlock *BB); bool calcZeroHeuristics(BasicBlock *BB); bool calcFloatingPointHeuristics(BasicBlock *BB); + bool calcInvokeHeuristics(BasicBlock *BB); }; } diff --git a/include/llvm/Analysis/Dominators.h b/include/llvm/Analysis/Dominators.h index 45be59b..a1cc196 100644 --- a/include/llvm/Analysis/Dominators.h +++ b/include/llvm/Analysis/Dominators.h @@ -705,6 +705,21 @@ DominatorTreeBase<NodeT>::properlyDominates(const NodeT *A, const NodeT *B) { EXTERN_TEMPLATE_INSTANTIATION(class DominatorTreeBase<BasicBlock>); +class BasicBlockEdge { + const BasicBlock *Start; + const BasicBlock *End; +public: + BasicBlockEdge(const BasicBlock *Start_, const BasicBlock *End_) : + Start(Start_), End(End_) { } + const BasicBlock *getStart() const { + return Start; + } + const BasicBlock *getEnd() const { + return End; + } + bool isSingleEdge() const; +}; + //===------------------------------------- /// DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to /// compute a normal dominator tree. @@ -778,6 +793,8 @@ public: bool dominates(const Instruction *Def, const Use &U) const; bool dominates(const Instruction *Def, const Instruction *User) const; bool dominates(const Instruction *Def, const BasicBlock *BB) const; + bool dominates(const BasicBlockEdge &BBE, const Use &U) const; + bool dominates(const BasicBlockEdge &BBE, const BasicBlock *BB) const; bool properlyDominates(const DomTreeNode *A, const DomTreeNode *B) const { return DT->properlyDominates(A, B); diff --git a/include/llvm/Analysis/MemoryBuiltins.h b/include/llvm/Analysis/MemoryBuiltins.h index e674e74..e16f389 100644 --- a/include/llvm/Analysis/MemoryBuiltins.h +++ b/include/llvm/Analysis/MemoryBuiltins.h @@ -146,6 +146,7 @@ class ObjectSizeOffsetVisitor bool RoundToAlign; unsigned IntTyBits; APInt Zero; + SmallPtrSet<Instruction *, 8> SeenInsts; APInt align(APInt Size, uint64_t Align); @@ -203,7 +204,6 @@ class ObjectSizeOffsetEvaluator const TargetData *TD; LLVMContext &Context; BuilderTy Builder; - ObjectSizeOffsetVisitor Visitor; IntegerType *IntTy; Value *Zero; CacheMapTy CacheMap; diff --git a/include/llvm/Analysis/MemoryDependenceAnalysis.h b/include/llvm/Analysis/MemoryDependenceAnalysis.h index 81ad3f0..7e049d6 100644 --- a/include/llvm/Analysis/MemoryDependenceAnalysis.h +++ b/include/llvm/Analysis/MemoryDependenceAnalysis.h @@ -124,11 +124,11 @@ namespace llvm { } /// isClobber - Return true if this MemDepResult represents a query that is - /// a instruction clobber dependency. + /// an instruction clobber dependency. bool isClobber() const { return Value.getInt() == Clobber; } /// isDef - Return true if this MemDepResult represents a query that is - /// a instruction definition dependency. + /// an instruction definition dependency. bool isDef() const { return Value.getInt() == Def; } /// isNonLocal - Return true if this MemDepResult represents a query that diff --git a/include/llvm/Analysis/RegionInfo.h b/include/llvm/Analysis/RegionInfo.h index eae94e7..188d11c 100644 --- a/include/llvm/Analysis/RegionInfo.h +++ b/include/llvm/Analysis/RegionInfo.h @@ -500,50 +500,58 @@ public: /// Region. The iterator also iterates over BasicBlocks that are elements of /// a subregion of this Region. It is therefore called a flat iterator. //@{ - template <typename RegionNodeItT> + template <bool IsConst> class block_iterator_wrapper - : public std::iterator<std::forward_iterator_tag, BasicBlock, ptrdiff_t> { - typedef std::iterator<std::forward_iterator_tag, BasicBlock, ptrdiff_t> + : public df_iterator<typename conditional<IsConst, + const BasicBlock, + BasicBlock>::type*> { + typedef df_iterator<typename conditional<IsConst, + const BasicBlock, + BasicBlock>::type*> super; - - RegionNodeItT Iter; - public: - typedef block_iterator_wrapper<RegionNodeItT> Self; + typedef block_iterator_wrapper<IsConst> Self; typedef typename super::pointer pointer; - block_iterator_wrapper(RegionNodeItT Iter) : Iter(Iter) {} - - bool operator==(const Self &RHS) const { return Iter == RHS.Iter; } - bool operator!=(const Self &RHS) const { return Iter != RHS.Iter; } - pointer operator*() const { - return (*Iter)->template getNodeAs<BasicBlock>(); + // Construct the begin iterator. + block_iterator_wrapper(pointer Entry, pointer Exit) : super(df_begin(Entry)) + { + // Mark the exit of the region as visited, so that the children of the + // exit and the exit itself, i.e. the block outside the region will never + // be visited. + super::Visited.insert(Exit); } - Self& operator++() { - ++Iter; - return *this; - } - Self operator++(int) { - Self tmp = *this; - ++*this; - return tmp; - } + // Construct the end iterator. + block_iterator_wrapper() : super(df_end<pointer>((BasicBlock *)0)) {} + + /*implicit*/ block_iterator_wrapper(super I) : super(I) {} - const Self &operator=(const Self &I) { - Iter = I.Iter; - return *this; + // FIXME: Even a const_iterator returns a non-const BasicBlock pointer. + // This was introduced for backwards compatibility, but should + // be removed as soon as all users are fixed. + BasicBlock *operator*() const { + return const_cast<BasicBlock*>(super::operator*()); } }; - typedef block_iterator_wrapper<block_node_iterator> block_iterator; - typedef block_iterator_wrapper<const_block_node_iterator> - const_block_iterator; - block_iterator block_begin(); - block_iterator block_end(); + typedef block_iterator_wrapper<false> block_iterator; + typedef block_iterator_wrapper<true> const_block_iterator; - const_block_iterator block_begin() const; - const_block_iterator block_end() const; + block_iterator block_begin() { + return block_iterator(getEntry(), getExit()); + } + + block_iterator block_end() { + return block_iterator(); + } + + const_block_iterator block_begin() const { + return const_block_iterator(getEntry(), getExit()); + } + const_block_iterator block_end() const { + return const_block_iterator(); + } //@} /// @name Element Iterators diff --git a/include/llvm/Attributes.h b/include/llvm/Attributes.h index 59fdd99..223aa00 100644 --- a/include/llvm/Attributes.h +++ b/include/llvm/Attributes.h @@ -134,6 +134,9 @@ DECLARE_LLVM_ATTRIBUTE(NonLazyBind,1U<<31) ///< Function is called early and/or /// often, so lazy binding isn't /// worthwhile. DECLARE_LLVM_ATTRIBUTE(AddressSafety,1ULL<<32) ///< Address safety checking is on. +DECLARE_LLVM_ATTRIBUTE(IANSDialect,1ULL<<33) ///< Inline asm non-standard dialect. + /// When not set, ATT dialect assumed. + /// When set implies the Intel dialect. #undef DECLARE_LLVM_ATTRIBUTE @@ -159,14 +162,16 @@ const AttrConst FunctionOnly = {NoReturn_i | NoUnwind_i | ReadNone_i | ReadOnly_i | NoInline_i | AlwaysInline_i | OptimizeForSize_i | StackProtect_i | StackProtectReq_i | NoRedZone_i | NoImplicitFloat_i | Naked_i | InlineHint_i | StackAlignment_i | - UWTable_i | NonLazyBind_i | ReturnsTwice_i | AddressSafety_i}; + UWTable_i | NonLazyBind_i | ReturnsTwice_i | AddressSafety_i | + IANSDialect_i}; /// @brief Parameter attributes that do not apply to vararg call arguments. const AttrConst VarArgsIncompatible = {StructRet_i}; /// @brief Attributes that are mutually incompatible. -const AttrConst MutuallyIncompatible[4] = { - {ByVal_i | InReg_i | Nest_i | StructRet_i}, +const AttrConst MutuallyIncompatible[5] = { + {ByVal_i | Nest_i | StructRet_i}, + {ByVal_i | Nest_i | InReg_i }, {ZExt_i | SExt_i}, {ReadNone_i | ReadOnly_i}, {NoInline_i | AlwaysInline_i} diff --git a/include/llvm/Bitcode/Archive.h b/include/llvm/Bitcode/Archive.h index 86c44c7..3c75e58 100644 --- a/include/llvm/Bitcode/Archive.h +++ b/include/llvm/Bitcode/Archive.h @@ -47,14 +47,13 @@ class ArchiveMember : public ilist_node<ArchiveMember> { /// characteristics of the member. The various "is" methods below provide /// access to the flags. The flags are not user settable. enum Flags { - CompressedFlag = 1, ///< Member is a normal compressed file - SVR4SymbolTableFlag = 2, ///< Member is a SVR4 symbol table - BSD4SymbolTableFlag = 4, ///< Member is a BSD4 symbol table - LLVMSymbolTableFlag = 8, ///< Member is an LLVM symbol table - BitcodeFlag = 16, ///< Member is bitcode - HasPathFlag = 64, ///< Member has a full or partial path - HasLongFilenameFlag = 128, ///< Member uses the long filename syntax - StringTableFlag = 256 ///< Member is an ar(1) format string table + SVR4SymbolTableFlag = 1, ///< Member is a SVR4 symbol table + BSD4SymbolTableFlag = 2, ///< Member is a BSD4 symbol table + LLVMSymbolTableFlag = 4, ///< Member is an LLVM symbol table + BitcodeFlag = 8, ///< Member is bitcode + HasPathFlag = 16, ///< Member has a full or partial path + HasLongFilenameFlag = 32, ///< Member uses the long filename syntax + StringTableFlag = 64 ///< Member is an ar(1) format string table }; /// @} @@ -109,11 +108,6 @@ class ArchiveMember : public ilist_node<ArchiveMember> { /// @brief Get the data content of the archive member const char* getData() const { return data; } - /// This method determines if the member is a regular compressed file. - /// @returns true iff the archive member is a compressed regular file. - /// @brief Determine if the member is a compressed regular file. - bool isCompressed() const { return flags&CompressedFlag; } - /// @returns true iff the member is a SVR4 (non-LLVM) symbol table /// @brief Determine if this member is a SVR4 symbol table. bool isSVR4SymbolTable() const { return flags&SVR4SymbolTableFlag; } @@ -427,7 +421,6 @@ class Archive { bool writeToDisk( bool CreateSymbolTable=false, ///< Create Symbol table bool TruncateNames=false, ///< Truncate the filename to 15 chars - bool Compress=false, ///< Compress files std::string* ErrMessage=0 ///< If non-null, where error msg is set ); @@ -494,7 +487,6 @@ class Archive { std::ofstream& ARFile, ///< The file to write member onto bool CreateSymbolTable, ///< Should symbol table be created? bool TruncateNames, ///< Should names be truncated to 11 chars? - bool ShouldCompress, ///< Should the member be compressed? std::string* ErrMessage ///< If non-null, place were error msg is set ); diff --git a/include/llvm/Bitcode/BitstreamWriter.h b/include/llvm/Bitcode/BitstreamWriter.h index 475da13..dea118f 100644 --- a/include/llvm/Bitcode/BitstreamWriter.h +++ b/include/llvm/Bitcode/BitstreamWriter.h @@ -155,6 +155,7 @@ public: } void EmitVBR(uint32_t Val, unsigned NumBits) { + assert(NumBits <= 32 && "Too many bits to emit!"); uint32_t Threshold = 1U << (NumBits-1); // Emit the bits with VBR encoding, NumBits-1 bits at a time. @@ -167,10 +168,11 @@ public: } void EmitVBR64(uint64_t Val, unsigned NumBits) { + assert(NumBits <= 32 && "Too many bits to emit!"); if ((uint32_t)Val == Val) return EmitVBR((uint32_t)Val, NumBits); - uint64_t Threshold = 1U << (NumBits-1); + uint32_t Threshold = 1U << (NumBits-1); // Emit the bits with VBR encoding, NumBits-1 bits at a time. while (Val >= Threshold) { diff --git a/include/llvm/CodeGen/FastISel.h b/include/llvm/CodeGen/FastISel.h index 9fe743e..7cb9695 100644 --- a/include/llvm/CodeGen/FastISel.h +++ b/include/llvm/CodeGen/FastISel.h @@ -34,6 +34,7 @@ class MachineFrameInfo; class MachineRegisterInfo; class TargetData; class TargetInstrInfo; +class TargetLibraryInfo; class TargetLowering; class TargetMachine; class TargetRegisterClass; @@ -57,6 +58,7 @@ protected: const TargetInstrInfo &TII; const TargetLowering &TLI; const TargetRegisterInfo &TRI; + const TargetLibraryInfo *LibInfo; /// The position of the last instruction for materializing constants /// for use in the current block. It resets to EmitStartPt when it @@ -144,7 +146,8 @@ public: virtual ~FastISel(); protected: - explicit FastISel(FunctionLoweringInfo &funcInfo); + explicit FastISel(FunctionLoweringInfo &funcInfo, + const TargetLibraryInfo *libInfo); /// TargetSelectInstruction - This method is called by target-independent /// code when the normal FastISel process fails to select an instruction. diff --git a/include/llvm/CodeGen/ISDOpcodes.h b/include/llvm/CodeGen/ISDOpcodes.h index 83a848c..f387bd5 100644 --- a/include/llvm/CodeGen/ISDOpcodes.h +++ b/include/llvm/CodeGen/ISDOpcodes.h @@ -126,6 +126,11 @@ namespace ISD { TargetExternalSymbol, TargetBlockAddress, + /// TargetIndex - Like a constant pool entry, but with completely + /// target-dependent semantics. Holds target flags, a 32-bit index, and a + /// 64-bit index. Targets can use this however they like. + TargetIndex, + /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) /// This node represents a target intrinsic function with no side effects. /// The first operand is the ID number of the intrinsic from the diff --git a/include/llvm/CodeGen/LiveInterval.h b/include/llvm/CodeGen/LiveInterval.h index 3fe7c8d..a3ce47c 100644 --- a/include/llvm/CodeGen/LiveInterval.h +++ b/include/llvm/CodeGen/LiveInterval.h @@ -40,15 +40,6 @@ namespace llvm { /// definition and use points. /// class VNInfo { - private: - enum { - HAS_PHI_KILL = 1, - IS_PHI_DEF = 1 << 1, - IS_UNUSED = 1 << 2 - }; - - unsigned char flags; - public: typedef BumpPtrAllocator Allocator; @@ -60,60 +51,30 @@ namespace llvm { /// VNInfo constructor. VNInfo(unsigned i, SlotIndex d) - : flags(0), id(i), def(d) + : id(i), def(d) { } /// VNInfo construtor, copies values from orig, except for the value number. VNInfo(unsigned i, const VNInfo &orig) - : flags(orig.flags), id(i), def(orig.def) + : id(i), def(orig.def) { } /// Copy from the parameter into this VNInfo. void copyFrom(VNInfo &src) { - flags = src.flags; def = src.def; } - /// Used for copying value number info. - unsigned getFlags() const { return flags; } - void setFlags(unsigned flags) { this->flags = flags; } - - /// Merge flags from another VNInfo - void mergeFlags(const VNInfo *VNI) { - flags = (flags | VNI->flags) & ~IS_UNUSED; - } - - /// Returns true if one or more kills are PHI nodes. - /// Obsolete, do not use! - bool hasPHIKill() const { return flags & HAS_PHI_KILL; } - /// Set the PHI kill flag on this value. - void setHasPHIKill(bool hasKill) { - if (hasKill) - flags |= HAS_PHI_KILL; - else - flags &= ~HAS_PHI_KILL; - } - /// Returns true if this value is defined by a PHI instruction (or was, /// PHI instrucions may have been eliminated). - bool isPHIDef() const { return flags & IS_PHI_DEF; } - /// Set the "phi def" flag on this value. - void setIsPHIDef(bool phiDef) { - if (phiDef) - flags |= IS_PHI_DEF; - else - flags &= ~IS_PHI_DEF; - } + /// PHI-defs begin at a block boundary, all other defs begin at register or + /// EC slots. + bool isPHIDef() const { return def.isBlock(); } /// Returns true if this value is unused. - bool isUnused() const { return flags & IS_UNUSED; } - /// Set the "is unused" flag on this value. - void setIsUnused(bool unused) { - if (unused) - flags |= IS_UNUSED; - else - flags &= ~IS_UNUSED; - } + bool isUnused() const { return !def.isValid(); } + + /// Mark this value as unused. + void markUnused() { def = SlotIndex(); } }; /// LiveRange structure - This represents a simple register range in the diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h index a344b1f..da521db 100644 --- a/include/llvm/CodeGen/LiveIntervalAnalysis.h +++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h @@ -241,18 +241,15 @@ namespace llvm { /// print - Implement the dump method. virtual void print(raw_ostream &O, const Module* = 0) const; - /// isReMaterializable - Returns true if every definition of MI of every - /// val# of the specified interval is re-materializable. Also returns true - /// by reference if all of the defs are load instructions. - bool isReMaterializable(const LiveInterval &li, - const SmallVectorImpl<LiveInterval*> *SpillIs, - bool &isLoad); - /// intervalIsInOneMBB - If LI is confined to a single basic block, return /// a pointer to that block. If LI is live in to or out of any block, /// return NULL. MachineBasicBlock *intervalIsInOneMBB(const LiveInterval &LI) const; + /// Returns true if VNI is killed by any PHI-def values in LI. + /// This may conservatively return true to avoid expensive computations. + bool hasPHIKill(const LiveInterval &LI, const VNInfo *VNI) const; + /// addKillFlags - Add kill flags to any instruction that kills a virtual /// register. void addKillFlags(); @@ -347,6 +344,12 @@ namespace llvm { /// computeIntervals - Compute live intervals. void computeIntervals(); + /// Compute live intervals for all virtual registers. + void computeVirtRegs(); + + /// Compute RegMaskSlots and RegMaskBits. + void computeRegMasks(); + /// handleRegisterDef - update intervals for a register def /// (calls handleVirtualRegisterDef) void handleRegisterDef(MachineBasicBlock *MBB, @@ -375,6 +378,7 @@ namespace llvm { void computeLiveInRegUnits(); void computeRegUnitInterval(LiveInterval*); + void computeVirtRegInterval(LiveInterval*); class HMEditor; }; diff --git a/include/llvm/CodeGen/MachineBasicBlock.h b/include/llvm/CodeGen/MachineBasicBlock.h index 4371aa5..77ea4d0 100644 --- a/include/llvm/CodeGen/MachineBasicBlock.h +++ b/include/llvm/CodeGen/MachineBasicBlock.h @@ -351,6 +351,8 @@ public: /// parameter is stored in Weights list and it may be used by /// MachineBranchProbabilityInfo analysis to calculate branch probability. /// + /// Note that duplicate Machine CFG edges are not allowed. + /// void addSuccessor(MachineBasicBlock *succ, uint32_t weight = 0); /// removeSuccessor - Remove successor from the successors list of this @@ -379,6 +381,10 @@ public: /// which refer to fromMBB to refer to this. void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *fromMBB); + /// isPredecessor - Return true if the specified MBB is a predecessor of this + /// block. + bool isPredecessor(const MachineBasicBlock *MBB) const; + /// isSuccessor - Return true if the specified MBB is a successor of this /// block. bool isSuccessor(const MachineBasicBlock *MBB) const; @@ -568,7 +574,7 @@ private: /// getSuccWeight - Return weight of the edge from this block to MBB. This /// method should NOT be called directly, but by using getEdgeWeight method /// from MachineBranchProbabilityInfo class. - uint32_t getSuccWeight(const MachineBasicBlock *succ) const; + uint32_t getSuccWeight(const_succ_iterator Succ) const; // Methods used to maintain doubly linked list of blocks... diff --git a/include/llvm/CodeGen/MachineBranchProbabilityInfo.h b/include/llvm/CodeGen/MachineBranchProbabilityInfo.h index af4db7d..12189ce 100644 --- a/include/llvm/CodeGen/MachineBranchProbabilityInfo.h +++ b/include/llvm/CodeGen/MachineBranchProbabilityInfo.h @@ -16,14 +16,12 @@ #define LLVM_CODEGEN_MACHINEBRANCHPROBABILITYINFO_H #include "llvm/Pass.h" +#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/Support/BranchProbability.h" #include <climits> namespace llvm { -class raw_ostream; -class MachineBasicBlock; - class MachineBranchProbabilityInfo : public ImmutablePass { virtual void anchor(); @@ -52,6 +50,11 @@ public: uint32_t getEdgeWeight(const MachineBasicBlock *Src, const MachineBasicBlock *Dst) const; + // Same thing, but using a const_succ_iterator from Src. This is faster when + // the iterator is already available. + uint32_t getEdgeWeight(const MachineBasicBlock *Src, + MachineBasicBlock::const_succ_iterator Dst) const; + // Get sum of the block successors' weights, potentially scaling them to fit // within 32-bits. If scaling is required, sets Scale based on the necessary // adjustment. Any edge weights used with the sum should be divided by Scale. diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index 65093d7..27756ab 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -420,6 +420,12 @@ public: return hasProperty(MCID::Bitcast, Type); } + /// isSelect - Return true if this instruction is a select instruction. + /// + bool isSelect(QueryType Type = IgnoreBundle) const { + return hasProperty(MCID::Select, Type); + } + /// isNotDuplicable - Return true if this instruction cannot be safely /// duplicated. For example, if the instruction has a unique labels attached /// to it, duplicating it would cause multiple definition errors. @@ -635,6 +641,30 @@ public: getOperand(0).getSubReg() == getOperand(1).getSubReg(); } + /// isTransient - Return true if this is a transient instruction that is + /// either very likely to be eliminated during register allocation (such as + /// copy-like instructions), or if this instruction doesn't have an + /// execution-time cost. + bool isTransient() const { + switch(getOpcode()) { + default: return false; + // Copy-like instructions are usually eliminated during register allocation. + case TargetOpcode::PHI: + case TargetOpcode::COPY: + case TargetOpcode::INSERT_SUBREG: + case TargetOpcode::SUBREG_TO_REG: + case TargetOpcode::REG_SEQUENCE: + // Pseudo-instructions that don't produce any real output. + case TargetOpcode::IMPLICIT_DEF: + case TargetOpcode::KILL: + case TargetOpcode::PROLOG_LABEL: + case TargetOpcode::EH_LABEL: + case TargetOpcode::GC_LABEL: + case TargetOpcode::DBG_VALUE: + return true; + } + } + /// getBundleSize - Return the number of instructions inside the MI bundle. unsigned getBundleSize() const; @@ -912,12 +942,12 @@ private: /// RemoveRegOperandsFromUseLists - Unlink all of the register operands in /// this instruction from their respective use lists. This requires that the /// operands already be on their use lists. - void RemoveRegOperandsFromUseLists(); + void RemoveRegOperandsFromUseLists(MachineRegisterInfo&); /// AddRegOperandsToUseLists - Add all of the register operands in /// this instruction from their respective use lists. This requires that the /// operands not be on their use lists yet. - void AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo); + void AddRegOperandsToUseLists(MachineRegisterInfo&); /// hasPropertyInBundle - Slow path for hasProperty when we're dealing with a /// bundle. diff --git a/include/llvm/CodeGen/MachineInstrBuilder.h b/include/llvm/CodeGen/MachineInstrBuilder.h index 9192474..654361f 100644 --- a/include/llvm/CodeGen/MachineInstrBuilder.h +++ b/include/llvm/CodeGen/MachineInstrBuilder.h @@ -108,6 +108,12 @@ public: return *this; } + const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0, + unsigned char TargetFlags = 0) const { + MI->addOperand(MachineOperand::CreateTargetIndex(Idx, Offset, TargetFlags)); + return *this; + } + const MachineInstrBuilder &addJumpTableIndex(unsigned Idx, unsigned char TargetFlags = 0) const { MI->addOperand(MachineOperand::CreateJTI(Idx, TargetFlags)); diff --git a/include/llvm/CodeGen/MachineOperand.h b/include/llvm/CodeGen/MachineOperand.h index c3b4f7c..37d42b3 100644 --- a/include/llvm/CodeGen/MachineOperand.h +++ b/include/llvm/CodeGen/MachineOperand.h @@ -45,6 +45,7 @@ public: MO_MachineBasicBlock, ///< MachineBasicBlock reference MO_FrameIndex, ///< Abstract Stack Frame Index MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool + MO_TargetIndex, ///< Target-dependent index+offset operand. MO_JumpTableIndex, ///< Address of indexed Jump Table for switch MO_ExternalSymbol, ///< Name of external global symbol MO_GlobalAddress, ///< Address of a global value @@ -149,7 +150,7 @@ private: struct { // For MO_Register. // Register number is in SmallContents.RegNo. - MachineOperand **Prev; // Access list for register. + MachineOperand *Prev; // Access list for register. See MRI. MachineOperand *Next; } Reg; @@ -215,6 +216,8 @@ public: bool isFI() const { return OpKind == MO_FrameIndex; } /// isCPI - Tests if this is a MO_ConstantPoolIndex operand. bool isCPI() const { return OpKind == MO_ConstantPoolIndex; } + /// isTargetIndex - Tests if this is a MO_TargetIndex operand. + bool isTargetIndex() const { return OpKind == MO_TargetIndex; } /// isJTI - Tests if this is a MO_JumpTableIndex operand. bool isJTI() const { return OpKind == MO_JumpTableIndex; } /// isGlobal - Tests if this is a MO_GlobalAddress operand. @@ -302,13 +305,6 @@ public: return !isUndef() && !isInternalRead() && (isUse() || getSubReg()); } - /// getNextOperandForReg - Return the next MachineOperand in the function that - /// uses or defines this register. - MachineOperand *getNextOperandForReg() const { - assert(isReg() && "This is not a register operand!"); - return Contents.Reg.Next; - } - //===--------------------------------------------------------------------===// // Mutators for Register Operands //===--------------------------------------------------------------------===// @@ -335,17 +331,9 @@ public: /// void substPhysReg(unsigned Reg, const TargetRegisterInfo&); - void setIsUse(bool Val = true) { - assert(isReg() && "Wrong MachineOperand accessor"); - assert((Val || !isDebug()) && "Marking a debug operation as def"); - IsDef = !Val; - } + void setIsUse(bool Val = true) { setIsDef(!Val); } - void setIsDef(bool Val = true) { - assert(isReg() && "Wrong MachineOperand accessor"); - assert((!Val || !isDebug()) && "Marking a debug operation as def"); - IsDef = Val; - } + void setIsDef(bool Val = true); void setImplicit(bool Val = true) { assert(isReg() && "Wrong MachineOperand accessor"); @@ -408,7 +396,7 @@ public: } int getIndex() const { - assert((isFI() || isCPI() || isJTI()) && + assert((isFI() || isCPI() || isTargetIndex() || isJTI()) && "Wrong MachineOperand accessor"); return Contents.OffsetedInfo.Val.Index; } @@ -431,8 +419,8 @@ public: /// getOffset - Return the offset from the symbol in this operand. This always /// returns 0 for ExternalSymbol operands. int64_t getOffset() const { - assert((isGlobal() || isSymbol() || isCPI() || isBlockAddress()) && - "Wrong MachineOperand accessor"); + assert((isGlobal() || isSymbol() || isCPI() || isTargetIndex() || + isBlockAddress()) && "Wrong MachineOperand accessor"); return (int64_t(Contents.OffsetedInfo.OffsetHi) << 32) | SmallContents.OffsetLo; } @@ -479,14 +467,14 @@ public: } void setOffset(int64_t Offset) { - assert((isGlobal() || isSymbol() || isCPI() || isBlockAddress()) && - "Wrong MachineOperand accessor"); + assert((isGlobal() || isSymbol() || isCPI() || isTargetIndex() || + isBlockAddress()) && "Wrong MachineOperand accessor"); SmallContents.OffsetLo = unsigned(Offset); Contents.OffsetedInfo.OffsetHi = int(Offset >> 32); } void setIndex(int Idx) { - assert((isFI() || isCPI() || isJTI()) && + assert((isFI() || isCPI() || isTargetIndex() || isJTI()) && "Wrong MachineOperand accessor"); Contents.OffsetedInfo.Val.Index = Idx; } @@ -587,6 +575,14 @@ public: Op.setTargetFlags(TargetFlags); return Op; } + static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, + unsigned char TargetFlags = 0) { + MachineOperand Op(MachineOperand::MO_TargetIndex); + Op.setIndex(Idx); + Op.setOffset(Offset); + Op.setTargetFlags(TargetFlags); + return Op; + } static MachineOperand CreateJTI(unsigned Idx, unsigned char TargetFlags = 0) { MachineOperand Op(MachineOperand::MO_JumpTableIndex); @@ -662,15 +658,6 @@ private: assert(isReg() && "Can only add reg operand to use lists"); return Contents.Reg.Prev != 0; } - - /// AddRegOperandToRegInfo - Add this register operand to the specified - /// MachineRegisterInfo. If it is null, then the next/prev fields should be - /// explicitly nulled out. - void AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo); - - /// RemoveRegOperandFromRegInfo - Remove this register operand from the - /// MachineRegisterInfo it is linked with. - void RemoveRegOperandFromRegInfo(); }; inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) { diff --git a/include/llvm/CodeGen/MachineRegisterInfo.h b/include/llvm/CodeGen/MachineRegisterInfo.h index 2bcd1c7..42a8aa4 100644 --- a/include/llvm/CodeGen/MachineRegisterInfo.h +++ b/include/llvm/CodeGen/MachineRegisterInfo.h @@ -57,6 +57,26 @@ class MachineRegisterInfo { /// physical registers. MachineOperand **PhysRegUseDefLists; + /// getRegUseDefListHead - Return the head pointer for the register use/def + /// list for the specified virtual or physical register. + MachineOperand *&getRegUseDefListHead(unsigned RegNo) { + if (TargetRegisterInfo::isVirtualRegister(RegNo)) + return VRegInfo[RegNo].second; + return PhysRegUseDefLists[RegNo]; + } + + MachineOperand *getRegUseDefListHead(unsigned RegNo) const { + if (TargetRegisterInfo::isVirtualRegister(RegNo)) + return VRegInfo[RegNo].second; + return PhysRegUseDefLists[RegNo]; + } + + /// Get the next element in the use-def chain. + static MachineOperand *getNextOperandForReg(const MachineOperand *MO) { + assert(MO && MO->isReg() && "This is not a register operand!"); + return MO->Contents.Reg.Next; + } + /// UsedPhysRegs - This is a bit vector that is computed and set by the /// register allocator, and must be kept up to date by passes that run after /// register allocation (though most don't modify this). This is used @@ -129,12 +149,21 @@ public: // Register Info //===--------------------------------------------------------------------===// + // Strictly for use by MachineInstr.cpp. + void addRegOperandToUseList(MachineOperand *MO); + + // Strictly for use by MachineInstr.cpp. + void removeRegOperandFromUseList(MachineOperand *MO); + /// reg_begin/reg_end - Provide iteration support to walk over all definitions /// and uses of a register within the MachineFunction that corresponds to this /// MachineRegisterInfo object. template<bool Uses, bool Defs, bool SkipDebug> class defusechain_iterator; + // Make it a friend so it can access getNextOperandForReg(). + template<bool, bool, bool> friend class defusechain_iterator; + /// reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified /// register. typedef defusechain_iterator<true,true,false> reg_iterator; @@ -172,6 +201,15 @@ public: /// specified register (it may be live-in). bool def_empty(unsigned RegNo) const { return def_begin(RegNo) == def_end(); } + /// hasOneDef - Return true if there is exactly one instruction defining the + /// specified register. + bool hasOneDef(unsigned RegNo) const { + def_iterator DI = def_begin(RegNo); + if (DI == def_end()) + return false; + return ++DI == def_end(); + } + /// use_iterator/use_begin/use_end - Walk all uses of the specified register. typedef defusechain_iterator<true,false,false> use_iterator; use_iterator use_begin(unsigned RegNo) const { @@ -185,7 +223,12 @@ public: /// hasOneUse - Return true if there is exactly one instruction using the /// specified register. - bool hasOneUse(unsigned RegNo) const; + bool hasOneUse(unsigned RegNo) const { + use_iterator UI = use_begin(RegNo); + if (UI == use_end()) + return false; + return ++UI == use_end(); + } /// use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the /// specified register, skipping those marked as Debug. @@ -218,20 +261,6 @@ public: /// constraints. void replaceRegWith(unsigned FromReg, unsigned ToReg); - /// getRegUseDefListHead - Return the head pointer for the register use/def - /// list for the specified virtual or physical register. - MachineOperand *&getRegUseDefListHead(unsigned RegNo) { - if (TargetRegisterInfo::isVirtualRegister(RegNo)) - return VRegInfo[RegNo].second; - return PhysRegUseDefLists[RegNo]; - } - - MachineOperand *getRegUseDefListHead(unsigned RegNo) const { - if (TargetRegisterInfo::isVirtualRegister(RegNo)) - return VRegInfo[RegNo].second; - return PhysRegUseDefLists[RegNo]; - } - /// getVRegDef - Return the machine instr that defines the specified virtual /// register or null if none is found. This assumes that the code is in SSA /// form, so there should only be one definition. @@ -439,10 +468,6 @@ public: const TargetRegisterInfo &TRI, const TargetInstrInfo &TII); -private: - void HandleVRegListReallocation(); - -public: /// defusechain_iterator - This class provides iterator support for machine /// operands in the function that use or define a specific register. If /// ReturnUses is true it returns uses of registers, if ReturnDefs is true it @@ -486,13 +511,22 @@ public: // Iterator traversal: forward iteration only defusechain_iterator &operator++() { // Preincrement assert(Op && "Cannot increment end iterator!"); - Op = Op->getNextOperandForReg(); - - // If this is an operand we don't care about, skip it. - while (Op && ((!ReturnUses && Op->isUse()) || - (!ReturnDefs && Op->isDef()) || - (SkipDebug && Op->isDebug()))) - Op = Op->getNextOperandForReg(); + Op = getNextOperandForReg(Op); + + // All defs come before the uses, so stop def_iterator early. + if (!ReturnUses) { + if (Op) { + if (Op->isUse()) + Op = 0; + else + assert(!Op->isDebug() && "Can't have debug defs"); + } + } else { + // If this is an operand we don't care about, skip it. + while (Op && ((!ReturnDefs && Op->isDef()) || + (SkipDebug && Op->isDebug()))) + Op = getNextOperandForReg(Op); + } return *this; } diff --git a/include/llvm/CodeGen/Passes.h b/include/llvm/CodeGen/Passes.h index c80f6dc..07b3b45 100644 --- a/include/llvm/CodeGen/Passes.h +++ b/include/llvm/CodeGen/Passes.h @@ -315,6 +315,10 @@ namespace llvm { /// This pass is still in development extern char &StrongPHIEliminationID; + /// LiveIntervals - This analysis keeps track of the live ranges of virtual + /// and physical registers. + extern char &LiveIntervalsID; + /// LiveStacks pass. An analysis keeping track of the liveness of stack slots. extern char &LiveStacksID; @@ -392,6 +396,10 @@ namespace llvm { /// into tails of their predecessors. extern char &TailDuplicateID; + /// MachineTraceMetrics - This pass computes critical path and CPU resource + /// usage in an ensemble of traces. + extern char &MachineTraceMetricsID; + /// EarlyIfConverter - This pass performs if-conversion on SSA form by /// inserting cmov instructions. extern char &EarlyIfConverterID; diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h index a5a912a..1ccfe54 100644 --- a/include/llvm/CodeGen/SelectionDAG.h +++ b/include/llvm/CodeGen/SelectionDAG.h @@ -422,6 +422,8 @@ public: int Offset = 0, unsigned char TargetFlags=0) { return getConstantPool(C, VT, Align, Offset, true, TargetFlags); } + SDValue getTargetIndex(int Index, EVT VT, int64_t Offset = 0, + unsigned char TargetFlags = 0); // When generating a branch to a BB, we don't in general know enough // to provide debug info for the BB at that time, so keep this one around. SDValue getBasicBlock(MachineBasicBlock *MBB); diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index 41407f1..db361ee 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -146,7 +146,8 @@ public: inline bool isMachineOpcode() const; inline unsigned getMachineOpcode() const; inline const DebugLoc getDebugLoc() const; - + inline void dump() const; + inline void dumpr() const; /// reachesChainWithoutSideEffects - Return true if this operand (which must /// be a chain) reaches the specified operand without crossing any @@ -806,7 +807,12 @@ inline bool SDValue::hasOneUse() const { inline const DebugLoc SDValue::getDebugLoc() const { return Node->getDebugLoc(); } - +inline void SDValue::dump() const { + return Node->dump(); +} +inline void SDValue::dumpr() const { + return Node->dumpr(); +} // Define inline functions from the SDUse class. inline void SDUse::set(const SDValue &V) { @@ -1343,6 +1349,29 @@ public: } }; +/// Completely target-dependent object reference. +class TargetIndexSDNode : public SDNode { + unsigned char TargetFlags; + int Index; + int64_t Offset; + friend class SelectionDAG; +public: + + TargetIndexSDNode(int Idx, EVT VT, int64_t Ofs, unsigned char TF) + : SDNode(ISD::TargetIndex, DebugLoc(), getSDVTList(VT)), + TargetFlags(TF), Index(Idx), Offset(Ofs) {} +public: + + unsigned char getTargetFlags() const { return TargetFlags; } + int getIndex() const { return Index; } + int64_t getOffset() const { return Offset; } + + static bool classof(const TargetIndexSDNode*) { return true; } + static bool classof(const SDNode *N) { + return N->getOpcode() == ISD::TargetIndex; + } +}; + class BasicBlockSDNode : public SDNode { MachineBasicBlock *MBB; friend class SelectionDAG; diff --git a/include/llvm/CodeGen/ValueTypes.h b/include/llvm/CodeGen/ValueTypes.h index bda43dc..eb38cd3 100644 --- a/include/llvm/CodeGen/ValueTypes.h +++ b/include/llvm/CodeGen/ValueTypes.h @@ -68,36 +68,38 @@ namespace llvm { v2i32 = 22, // 2 x i32 v4i32 = 23, // 4 x i32 v8i32 = 24, // 8 x i32 - v1i64 = 25, // 1 x i64 - v2i64 = 26, // 2 x i64 - v4i64 = 27, // 4 x i64 - v8i64 = 28, // 8 x i64 - - v2f16 = 29, // 2 x f16 - v2f32 = 30, // 2 x f32 - v4f32 = 31, // 4 x f32 - v8f32 = 32, // 8 x f32 - v2f64 = 33, // 2 x f64 - v4f64 = 34, // 4 x f64 + v16i32 = 25, // 16 x i32 + v1i64 = 26, // 1 x i64 + v2i64 = 27, // 2 x i64 + v4i64 = 28, // 4 x i64 + v8i64 = 29, // 8 x i64 + v16i64 = 30, // 16 x i64 + + v2f16 = 31, // 2 x f16 + v2f32 = 32, // 2 x f32 + v4f32 = 33, // 4 x f32 + v8f32 = 34, // 8 x f32 + v2f64 = 35, // 2 x f64 + v4f64 = 36, // 4 x f64 FIRST_VECTOR_VALUETYPE = v2i8, LAST_VECTOR_VALUETYPE = v4f64, FIRST_INTEGER_VECTOR_VALUETYPE = v2i8, - LAST_INTEGER_VECTOR_VALUETYPE = v8i64, + LAST_INTEGER_VECTOR_VALUETYPE = v16i64, FIRST_FP_VECTOR_VALUETYPE = v2f16, LAST_FP_VECTOR_VALUETYPE = v4f64, - x86mmx = 35, // This is an X86 MMX value + x86mmx = 37, // This is an X86 MMX value - Glue = 36, // This glues nodes together during pre-RA sched + Glue = 38, // This glues nodes together during pre-RA sched - isVoid = 37, // This has no value + isVoid = 39, // This has no value - Untyped = 38, // This value takes a register, but has + Untyped = 40, // This value takes a register, but has // unspecified type. The register class // will be determined by the opcode. - LAST_VALUETYPE = 39, // This always remains at the end of the list. + LAST_VALUETYPE = 41, // This always remains at the end of the list. // This is the current maximum for LAST_VALUETYPE. // MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors @@ -156,7 +158,7 @@ namespace llvm { return ((SimpleTy >= MVT::FIRST_FP_VALUETYPE && SimpleTy <= MVT::LAST_FP_VALUETYPE) || (SimpleTy >= MVT::FIRST_FP_VECTOR_VALUETYPE && - SimpleTy <= MVT::LAST_FP_VECTOR_VALUETYPE)); + SimpleTy <= MVT::LAST_FP_VECTOR_VALUETYPE)); } /// isInteger - Return true if this is an integer, or a vector integer type. @@ -173,6 +175,37 @@ namespace llvm { SimpleTy <= MVT::LAST_VECTOR_VALUETYPE); } + /// is64BitVector - Return true if this is a 64-bit vector type. + bool is64BitVector() const { + return (SimpleTy == MVT::v8i8 || SimpleTy == MVT::v4i16 || + SimpleTy == MVT::v2i32 || SimpleTy == MVT::v1i64 || + SimpleTy == MVT::v2f32); + } + + /// is128BitVector - Return true if this is a 128-bit vector type. + bool is128BitVector() const { + return (SimpleTy == MVT::v16i8 || SimpleTy == MVT::v8i16 || + SimpleTy == MVT::v4i32 || SimpleTy == MVT::v2i64 || + SimpleTy == MVT::v4f32 || SimpleTy == MVT::v2f64); + } + + /// is256BitVector - Return true if this is a 256-bit vector type. + bool is256BitVector() const { + return (SimpleTy == MVT::v8f32 || SimpleTy == MVT::v4f64 || + SimpleTy == MVT::v32i8 || SimpleTy == MVT::v16i16 || + SimpleTy == MVT::v8i32 || SimpleTy == MVT::v4i64); + } + + /// is512BitVector - Return true if this is a 512-bit vector type. + bool is512BitVector() const { + return (SimpleTy == MVT::v8i64 || SimpleTy == MVT::v16i32); + } + + /// is1024BitVector - Return true if this is a 1024-bit vector type. + bool is1024BitVector() const { + return (SimpleTy == MVT::v16i64); + } + /// isPow2VectorType - Returns true if the given vector is a power of 2. bool isPow2VectorType() const { unsigned NElts = getVectorNumElements(); @@ -211,11 +244,13 @@ namespace llvm { case v16i16: return i16; case v2i32: case v4i32: - case v8i32: return i32; + case v8i32: + case v16i32: return i32; case v1i64: case v2i64: case v4i64: - case v8i64: return i64; + case v8i64: + case v16i64: return i64; case v2f16: return f16; case v2f32: case v4f32: @@ -231,7 +266,9 @@ namespace llvm { llvm_unreachable("Not a vector MVT!"); case v32i8: return 32; case v16i8: - case v16i16: return 16; + case v16i16: + case v16i32: + case v16i64:return 16; case v8i8 : case v8i16: case v8i32: @@ -298,7 +335,9 @@ namespace llvm { case v4i64: case v8f32: case v4f64: return 256; + case v16i32: case v8i64: return 512; + case v16i64:return 1024; } } @@ -371,12 +410,14 @@ namespace llvm { if (NumElements == 2) return MVT::v2i32; if (NumElements == 4) return MVT::v4i32; if (NumElements == 8) return MVT::v8i32; + if (NumElements == 16) return MVT::v16i32; break; case MVT::i64: if (NumElements == 1) return MVT::v1i64; if (NumElements == 2) return MVT::v2i64; if (NumElements == 4) return MVT::v4i64; if (NumElements == 8) return MVT::v8i64; + if (NumElements == 16) return MVT::v16i64; break; case MVT::f16: if (NumElements == 2) return MVT::v2f16; @@ -490,32 +531,27 @@ namespace llvm { /// is64BitVector - Return true if this is a 64-bit vector type. bool is64BitVector() const { - if (!isSimple()) - return isExtended64BitVector(); - - return (V == MVT::v8i8 || V==MVT::v4i16 || V==MVT::v2i32 || - V == MVT::v1i64 || V==MVT::v2f32); + return isSimple() ? V.is64BitVector() : isExtended64BitVector(); } /// is128BitVector - Return true if this is a 128-bit vector type. bool is128BitVector() const { - if (!isSimple()) - return isExtended128BitVector(); - return (V==MVT::v16i8 || V==MVT::v8i16 || V==MVT::v4i32 || - V==MVT::v2i64 || V==MVT::v4f32 || V==MVT::v2f64); + return isSimple() ? V.is128BitVector() : isExtended128BitVector(); } /// is256BitVector - Return true if this is a 256-bit vector type. bool is256BitVector() const { - if (!isSimple()) - return isExtended256BitVector(); - return (V == MVT::v8f32 || V == MVT::v4f64 || V == MVT::v32i8 || - V == MVT::v16i16 || V == MVT::v8i32 || V == MVT::v4i64); + return isSimple() ? V.is256BitVector() : isExtended256BitVector(); } /// is512BitVector - Return true if this is a 512-bit vector type. bool is512BitVector() const { - return isSimple() ? (V == MVT::v8i64) : isExtended512BitVector(); + return isSimple() ? V.is512BitVector() : isExtended512BitVector(); + } + + /// is1024BitVector - Return true if this is a 1024-bit vector type. + bool is1024BitVector() const { + return isSimple() ? V.is1024BitVector() : isExtended1024BitVector(); } /// isOverloaded - Return true if this is an overloaded type for TableGen. @@ -708,6 +744,7 @@ namespace llvm { bool isExtended128BitVector() const; bool isExtended256BitVector() const; bool isExtended512BitVector() const; + bool isExtended1024BitVector() const; EVT getExtendedVectorElementType() const; unsigned getExtendedVectorNumElements() const; unsigned getExtendedSizeInBits() const; diff --git a/include/llvm/CodeGen/ValueTypes.td b/include/llvm/CodeGen/ValueTypes.td index 6c22690..f4b75bd 100644 --- a/include/llvm/CodeGen/ValueTypes.td +++ b/include/llvm/CodeGen/ValueTypes.td @@ -45,22 +45,24 @@ def v16i16 : ValueType<256, 21>; // 16 x i16 vector value def v2i32 : ValueType<64 , 22>; // 2 x i32 vector value def v4i32 : ValueType<128, 23>; // 4 x i32 vector value def v8i32 : ValueType<256, 24>; // 8 x i32 vector value -def v1i64 : ValueType<64 , 25>; // 1 x i64 vector value -def v2i64 : ValueType<128, 26>; // 2 x i64 vector value -def v4i64 : ValueType<256, 27>; // 4 x i64 vector value -def v8i64 : ValueType<512, 28>; // 8 x i64 vector value +def v16i32 : ValueType<512, 25>; // 16 x i32 vector value +def v1i64 : ValueType<64 , 26>; // 1 x i64 vector value +def v2i64 : ValueType<128, 27>; // 2 x i64 vector value +def v4i64 : ValueType<256, 28>; // 4 x i64 vector value +def v8i64 : ValueType<512, 29>; // 8 x i64 vector value +def v16i64 : ValueType<1024,30>; // 16 x i64 vector value -def v2f16 : ValueType<32 , 29>; // 2 x f16 vector value -def v2f32 : ValueType<64 , 30>; // 2 x f32 vector value -def v4f32 : ValueType<128, 31>; // 4 x f32 vector value -def v8f32 : ValueType<256, 32>; // 8 x f32 vector value -def v2f64 : ValueType<128, 33>; // 2 x f64 vector value -def v4f64 : ValueType<256, 34>; // 4 x f64 vector value +def v2f16 : ValueType<32 , 31>; // 2 x f16 vector value +def v2f32 : ValueType<64 , 32>; // 2 x f32 vector value +def v4f32 : ValueType<128, 33>; // 4 x f32 vector value +def v8f32 : ValueType<256, 34>; // 8 x f32 vector value +def v2f64 : ValueType<128, 35>; // 2 x f64 vector value +def v4f64 : ValueType<256, 36>; // 4 x f64 vector value -def x86mmx : ValueType<64 , 35>; // X86 MMX value -def FlagVT : ValueType<0 , 36>; // Pre-RA sched glue -def isVoid : ValueType<0 , 37>; // Produces no value -def untyped: ValueType<8 , 38>; // Produces an untyped value +def x86mmx : ValueType<64 , 37>; // X86 MMX value +def FlagVT : ValueType<0 , 38>; // Pre-RA sched glue +def isVoid : ValueType<0 , 39>; // Produces no value +def untyped: ValueType<8 , 40>; // Produces an untyped value def MetadataVT: ValueType<0, 250>; // Metadata diff --git a/include/llvm/Config/config.h.in b/include/llvm/Config/config.h.in index fcd57a4..5a60ba5 100644 --- a/include/llvm/Config/config.h.in +++ b/include/llvm/Config/config.h.in @@ -6,6 +6,9 @@ /* Bug report URL. */ #undef BUG_REPORT_URL +/* Define if we have libxml2 */ +#undef CLANG_HAVE_LIBXML + /* Relative directory for resource files */ #undef CLANG_RESOURCE_DIR diff --git a/include/llvm/GlobalValue.h b/include/llvm/GlobalValue.h index 8b969f3..391b830 100644 --- a/include/llvm/GlobalValue.h +++ b/include/llvm/GlobalValue.h @@ -34,6 +34,7 @@ public: AvailableExternallyLinkage, ///< Available for inspection, not emission. LinkOnceAnyLinkage, ///< Keep one copy of function when linking (inline) LinkOnceODRLinkage, ///< Same, but only replaced by something equivalent. + LinkOnceODRAutoHideLinkage, ///< Like LinkOnceODRLinkage but addr not taken. WeakAnyLinkage, ///< Keep one copy of named function when linking (weak) WeakODRLinkage, ///< Same, but only replaced by something equivalent. AppendingLinkage, ///< Special purpose, only applies to global arrays @@ -41,8 +42,6 @@ public: PrivateLinkage, ///< Like Internal, but omit from symbol table. LinkerPrivateLinkage, ///< Like Private, but linker removes. LinkerPrivateWeakLinkage, ///< Like LinkerPrivate, but weak. - LinkerPrivateWeakDefAutoLinkage, ///< Like LinkerPrivateWeak, but possibly - /// hidden. DLLImportLinkage, ///< Function to be imported from DLL DLLExportLinkage, ///< Function to be accessible from DLL. ExternalWeakLinkage,///< ExternalWeak linkage description. @@ -123,7 +122,12 @@ public: return Linkage == AvailableExternallyLinkage; } static bool isLinkOnceLinkage(LinkageTypes Linkage) { - return Linkage == LinkOnceAnyLinkage || Linkage == LinkOnceODRLinkage; + return Linkage == LinkOnceAnyLinkage || + Linkage == LinkOnceODRLinkage || + Linkage == LinkOnceODRAutoHideLinkage; + } + static bool isLinkOnceODRAutoHideLinkage(LinkageTypes Linkage) { + return Linkage == LinkOnceODRAutoHideLinkage; } static bool isWeakLinkage(LinkageTypes Linkage) { return Linkage == WeakAnyLinkage || Linkage == WeakODRLinkage; @@ -143,13 +147,9 @@ public: static bool isLinkerPrivateWeakLinkage(LinkageTypes Linkage) { return Linkage == LinkerPrivateWeakLinkage; } - static bool isLinkerPrivateWeakDefAutoLinkage(LinkageTypes Linkage) { - return Linkage == LinkerPrivateWeakDefAutoLinkage; - } static bool isLocalLinkage(LinkageTypes Linkage) { return isInternalLinkage(Linkage) || isPrivateLinkage(Linkage) || - isLinkerPrivateLinkage(Linkage) || isLinkerPrivateWeakLinkage(Linkage) || - isLinkerPrivateWeakDefAutoLinkage(Linkage); + isLinkerPrivateLinkage(Linkage) || isLinkerPrivateWeakLinkage(Linkage); } static bool isDLLImportLinkage(LinkageTypes Linkage) { return Linkage == DLLImportLinkage; @@ -178,8 +178,7 @@ public: Linkage == LinkOnceAnyLinkage || Linkage == CommonLinkage || Linkage == ExternalWeakLinkage || - Linkage == LinkerPrivateWeakLinkage || - Linkage == LinkerPrivateWeakDefAutoLinkage; + Linkage == LinkerPrivateWeakLinkage; } /// isWeakForLinker - Whether the definition of this global may be replaced at @@ -192,10 +191,10 @@ public: Linkage == WeakODRLinkage || Linkage == LinkOnceAnyLinkage || Linkage == LinkOnceODRLinkage || + Linkage == LinkOnceODRAutoHideLinkage || Linkage == CommonLinkage || Linkage == ExternalWeakLinkage || - Linkage == LinkerPrivateWeakLinkage || - Linkage == LinkerPrivateWeakDefAutoLinkage; + Linkage == LinkerPrivateWeakLinkage; } bool hasExternalLinkage() const { return isExternalLinkage(Linkage); } @@ -205,6 +204,9 @@ public: bool hasLinkOnceLinkage() const { return isLinkOnceLinkage(Linkage); } + bool hasLinkOnceODRAutoHideLinkage() const { + return isLinkOnceODRAutoHideLinkage(Linkage); + } bool hasWeakLinkage() const { return isWeakLinkage(Linkage); } @@ -215,9 +217,6 @@ public: bool hasLinkerPrivateWeakLinkage() const { return isLinkerPrivateWeakLinkage(Linkage); } - bool hasLinkerPrivateWeakDefAutoLinkage() const { - return isLinkerPrivateWeakDefAutoLinkage(Linkage); - } bool hasLocalLinkage() const { return isLocalLinkage(Linkage); } bool hasDLLImportLinkage() const { return isDLLImportLinkage(Linkage); } bool hasDLLExportLinkage() const { return isDLLExportLinkage(Linkage); } diff --git a/include/llvm/InitializePasses.h b/include/llvm/InitializePasses.h index e6fa8c3..de97957 100644 --- a/include/llvm/InitializePasses.h +++ b/include/llvm/InitializePasses.h @@ -172,6 +172,7 @@ void initializeMachineLoopRangesPass(PassRegistry&); void initializeMachineModuleInfoPass(PassRegistry&); void initializeMachineSchedulerPass(PassRegistry&); void initializeMachineSinkingPass(PassRegistry&); +void initializeMachineTraceMetricsPass(PassRegistry&); void initializeMachineVerifierPassPass(PassRegistry&); void initializeMemCpyOptPass(PassRegistry&); void initializeMemDepPrinterPass(PassRegistry&); diff --git a/include/llvm/Intrinsics.td b/include/llvm/Intrinsics.td index 06850c9..d1a0fee 100644 --- a/include/llvm/Intrinsics.td +++ b/include/llvm/Intrinsics.td @@ -133,9 +133,12 @@ def llvm_v16i16_ty : LLVMType<v16i16>; // 16 x i16 def llvm_v2i32_ty : LLVMType<v2i32>; // 2 x i32 def llvm_v4i32_ty : LLVMType<v4i32>; // 4 x i32 def llvm_v8i32_ty : LLVMType<v8i32>; // 8 x i32 +def llvm_v16i32_ty : LLVMType<v16i32>; // 16 x i32 def llvm_v1i64_ty : LLVMType<v1i64>; // 1 x i64 def llvm_v2i64_ty : LLVMType<v2i64>; // 2 x i64 def llvm_v4i64_ty : LLVMType<v4i64>; // 4 x i64 +def llvm_v8i64_ty : LLVMType<v8i64>; // 8 x i64 +def llvm_v16i64_ty : LLVMType<v16i64>; // 16 x i64 def llvm_v2f32_ty : LLVMType<v2f32>; // 2 x float def llvm_v4f32_ty : LLVMType<v4f32>; // 4 x float @@ -261,6 +264,7 @@ let Properties = [IntrReadMem] in { def int_exp : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>; def int_exp2 : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>; def int_fabs : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>; + def int_floor : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>; } let Properties = [IntrNoMem] in { diff --git a/include/llvm/IntrinsicsHexagon.td b/include/llvm/IntrinsicsHexagon.td index efd04f3..8a88729 100644 --- a/include/llvm/IntrinsicsHexagon.td +++ b/include/llvm/IntrinsicsHexagon.td @@ -15,7 +15,7 @@ // // All Hexagon intrinsics start with "llvm.hexagon.". let TargetPrefix = "hexagon" in { - /// Hexagon_Intrinsic - Base class for all altivec intrinsics. + /// Hexagon_Intrinsic - Base class for all Hexagon intrinsics. class Hexagon_Intrinsic<string GCCIntSuffix, list<LLVMType> ret_types, list<LLVMType> param_types, list<IntrinsicProperty> properties> diff --git a/include/llvm/IntrinsicsMips.td b/include/llvm/IntrinsicsMips.td index e260a37..4375ac2 100644 --- a/include/llvm/IntrinsicsMips.td +++ b/include/llvm/IntrinsicsMips.td @@ -22,26 +22,22 @@ let TargetPrefix = "mips" in { // All intrinsics start with "llvm.mips.". // Addition/subtraction def int_mips_addu_qb : GCCBuiltin<"__builtin_mips_addu_qb">, - Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], - [IntrNoMem, Commutative]>; + Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [Commutative]>; def int_mips_addu_s_qb : GCCBuiltin<"__builtin_mips_addu_s_qb">, - Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], - [IntrNoMem, Commutative]>; + Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [Commutative]>; def int_mips_subu_qb : GCCBuiltin<"__builtin_mips_subu_qb">, - Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [IntrNoMem]>; + Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], []>; def int_mips_subu_s_qb : GCCBuiltin<"__builtin_mips_subu_s_qb">, - Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [IntrNoMem]>; + Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], []>; def int_mips_addq_ph : GCCBuiltin<"__builtin_mips_addq_ph">, - Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], - [IntrNoMem, Commutative]>; + Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>; def int_mips_addq_s_ph : GCCBuiltin<"__builtin_mips_addq_s_ph">, - Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], - [IntrNoMem, Commutative]>; + Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>; def int_mips_subq_ph : GCCBuiltin<"__builtin_mips_subq_ph">, - Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [IntrNoMem]>; + Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], []>; def int_mips_subq_s_ph : GCCBuiltin<"__builtin_mips_subq_s_ph">, - Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [IntrNoMem]>; + Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], []>; def int_mips_madd: GCCBuiltin<"__builtin_mips_madd">, Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], @@ -58,17 +54,14 @@ def int_mips_msubu: GCCBuiltin<"__builtin_mips_msubu">, [IntrNoMem]>; def int_mips_addq_s_w: GCCBuiltin<"__builtin_mips_addq_s_w">, - Intrinsic<[mips_q31_ty], [mips_q31_ty, mips_q31_ty], - [IntrNoMem, Commutative]>; + Intrinsic<[mips_q31_ty], [mips_q31_ty, mips_q31_ty], [Commutative]>; def int_mips_subq_s_w: GCCBuiltin<"__builtin_mips_subq_s_w">, - Intrinsic<[mips_q31_ty], [mips_q31_ty, mips_q31_ty], [IntrNoMem]>; + Intrinsic<[mips_q31_ty], [mips_q31_ty, mips_q31_ty], []>; def int_mips_addsc: GCCBuiltin<"__builtin_mips_addsc">, - Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], - [IntrNoMem, Commutative]>; + Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [Commutative]>; def int_mips_addwc: GCCBuiltin<"__builtin_mips_addwc">, - Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], - [IntrNoMem, Commutative]>; + Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [Commutative]>; def int_mips_modsub: GCCBuiltin<"__builtin_mips_modsub">, Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; @@ -80,9 +73,9 @@ def int_mips_raddu_w_qb: GCCBuiltin<"__builtin_mips_raddu_w_qb">, // Absolute value def int_mips_absq_s_ph: GCCBuiltin<"__builtin_mips_absq_s_ph">, - Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty], [IntrNoMem]>; + Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty], []>; def int_mips_absq_s_w: GCCBuiltin<"__builtin_mips_absq_s_w">, - Intrinsic<[mips_q31_ty], [mips_q31_ty], [IntrNoMem]>; + Intrinsic<[mips_q31_ty], [mips_q31_ty], []>; //===----------------------------------------------------------------------===// // Precision reduce/expand @@ -90,11 +83,11 @@ def int_mips_absq_s_w: GCCBuiltin<"__builtin_mips_absq_s_w">, def int_mips_precrq_qb_ph: GCCBuiltin<"__builtin_mips_precrq_qb_ph">, Intrinsic<[llvm_v4i8_ty], [mips_v2q15_ty, mips_v2q15_ty], [IntrNoMem]>; def int_mips_precrqu_s_qb_ph: GCCBuiltin<"__builtin_mips_precrqu_s_qb_ph">, - Intrinsic<[llvm_v4i8_ty], [mips_v2q15_ty, mips_v2q15_ty], [IntrNoMem]>; + Intrinsic<[llvm_v4i8_ty], [mips_v2q15_ty, mips_v2q15_ty], []>; def int_mips_precrq_ph_w: GCCBuiltin<"__builtin_mips_precrq_ph_w">, Intrinsic<[mips_v2q15_ty], [mips_q31_ty, mips_q31_ty], [IntrNoMem]>; def int_mips_precrq_rs_ph_w: GCCBuiltin<"__builtin_mips_precrq_rs_ph_w">, - Intrinsic<[mips_v2q15_ty], [mips_q31_ty, mips_q31_ty], [IntrNoMem]>; + Intrinsic<[mips_v2q15_ty], [mips_q31_ty, mips_q31_ty], []>; def int_mips_preceq_w_phl: GCCBuiltin<"__builtin_mips_preceq_w_phl">, Intrinsic<[mips_q31_ty], [mips_v2q15_ty], [IntrNoMem]>; def int_mips_preceq_w_phr: GCCBuiltin<"__builtin_mips_preceq_w_phr">, @@ -120,19 +113,19 @@ def int_mips_preceu_ph_qbra: GCCBuiltin<"__builtin_mips_preceu_ph_qbra">, // Shift def int_mips_shll_qb: GCCBuiltin<"__builtin_mips_shll_qb">, - Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_i32_ty], []>; def int_mips_shrl_qb: GCCBuiltin<"__builtin_mips_shrl_qb">, Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_i32_ty], [IntrNoMem]>; def int_mips_shll_ph: GCCBuiltin<"__builtin_mips_shll_ph">, - Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, llvm_i32_ty], []>; def int_mips_shll_s_ph: GCCBuiltin<"__builtin_mips_shll_s_ph">, - Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, llvm_i32_ty], []>; def int_mips_shra_ph: GCCBuiltin<"__builtin_mips_shra_ph">, Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, llvm_i32_ty], [IntrNoMem]>; def int_mips_shra_r_ph: GCCBuiltin<"__builtin_mips_shra_r_ph">, Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, llvm_i32_ty], [IntrNoMem]>; def int_mips_shll_s_w: GCCBuiltin<"__builtin_mips_shll_s_w">, - Intrinsic<[mips_q31_ty], [mips_q31_ty, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[mips_q31_ty], [mips_q31_ty, llvm_i32_ty], []>; def int_mips_shra_r_w: GCCBuiltin<"__builtin_mips_shra_r_w">, Intrinsic<[mips_q31_ty], [mips_q31_ty, llvm_i32_ty], [IntrNoMem]>; def int_mips_shilo: GCCBuiltin<"__builtin_mips_shilo">, @@ -142,33 +135,25 @@ def int_mips_shilo: GCCBuiltin<"__builtin_mips_shilo">, // Multiplication def int_mips_muleu_s_ph_qbl: GCCBuiltin<"__builtin_mips_muleu_s_ph_qbl">, - Intrinsic<[mips_v2q15_ty], [llvm_v4i8_ty, mips_v2q15_ty], [IntrNoMem]>; + Intrinsic<[mips_v2q15_ty], [llvm_v4i8_ty, mips_v2q15_ty], []>; def int_mips_muleu_s_ph_qbr: GCCBuiltin<"__builtin_mips_muleu_s_ph_qbr">, - Intrinsic<[mips_v2q15_ty], [llvm_v4i8_ty, mips_v2q15_ty], [IntrNoMem]>; + Intrinsic<[mips_v2q15_ty], [llvm_v4i8_ty, mips_v2q15_ty], []>; def int_mips_mulq_rs_ph: GCCBuiltin<"__builtin_mips_mulq_rs_ph">, - Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], - [IntrNoMem, Commutative]>; + Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>; def int_mips_muleq_s_w_phl: GCCBuiltin<"__builtin_mips_muleq_s_w_phl">, - Intrinsic<[mips_q31_ty], [mips_v2q15_ty, mips_v2q15_ty], - [IntrNoMem, Commutative]>; + Intrinsic<[mips_q31_ty], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>; def int_mips_muleq_s_w_phr: GCCBuiltin<"__builtin_mips_muleq_s_w_phr">, - Intrinsic<[mips_q31_ty], [mips_v2q15_ty, mips_v2q15_ty], - [IntrNoMem, Commutative]>; + Intrinsic<[mips_q31_ty], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>; def int_mips_mulsaq_s_w_ph: GCCBuiltin<"__builtin_mips_mulsaq_s_w_ph">, - Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], - [IntrNoMem]>; + Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>; def int_mips_maq_s_w_phl: GCCBuiltin<"__builtin_mips_maq_s_w_phl">, - Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], - [IntrNoMem]>; + Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>; def int_mips_maq_s_w_phr: GCCBuiltin<"__builtin_mips_maq_s_w_phr">, - Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], - [IntrNoMem]>; + Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>; def int_mips_maq_sa_w_phl: GCCBuiltin<"__builtin_mips_maq_sa_w_phl">, - Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], - [IntrNoMem]>; + Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>; def int_mips_maq_sa_w_phr: GCCBuiltin<"__builtin_mips_maq_sa_w_phr">, - Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], - [IntrNoMem]>; + Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>; def int_mips_mult: GCCBuiltin<"__builtin_mips_mult">, Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem, Commutative]>; @@ -192,69 +177,62 @@ def int_mips_dpsu_h_qbr: GCCBuiltin<"__builtin_mips_dpsu_h_qbr">, Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_v4i8_ty, llvm_v4i8_ty], [IntrNoMem]>; def int_mips_dpaq_s_w_ph: GCCBuiltin<"__builtin_mips_dpaq_s_w_ph">, - Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], - [IntrNoMem]>; + Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>; def int_mips_dpsq_s_w_ph: GCCBuiltin<"__builtin_mips_dpsq_s_w_ph">, - Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], - [IntrNoMem]>; + Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>; def int_mips_dpaq_sa_l_w: GCCBuiltin<"__builtin_mips_dpaq_sa_l_w">, - Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_q31_ty, mips_q31_ty], - [IntrNoMem]>; + Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_q31_ty, mips_q31_ty], []>; def int_mips_dpsq_sa_l_w: GCCBuiltin<"__builtin_mips_dpsq_sa_l_w">, - Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_q31_ty, mips_q31_ty], - [IntrNoMem]>; + Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_q31_ty, mips_q31_ty], []>; //===----------------------------------------------------------------------===// // Comparison def int_mips_cmpu_eq_qb: GCCBuiltin<"__builtin_mips_cmpu_eq_qb">, - Intrinsic<[], [llvm_v4i8_ty, llvm_v4i8_ty], [IntrNoMem, Commutative]>; + Intrinsic<[], [llvm_v4i8_ty, llvm_v4i8_ty], [Commutative]>; def int_mips_cmpu_lt_qb: GCCBuiltin<"__builtin_mips_cmpu_lt_qb">, - Intrinsic<[], [llvm_v4i8_ty, llvm_v4i8_ty], [IntrNoMem, Commutative]>; + Intrinsic<[], [llvm_v4i8_ty, llvm_v4i8_ty], [Commutative]>; def int_mips_cmpu_le_qb: GCCBuiltin<"__builtin_mips_cmpu_le_qb">, - Intrinsic<[], [llvm_v4i8_ty, llvm_v4i8_ty], [IntrNoMem, Commutative]>; + Intrinsic<[], [llvm_v4i8_ty, llvm_v4i8_ty], [Commutative]>; def int_mips_cmpgu_eq_qb: GCCBuiltin<"__builtin_mips_cmpgu_eq_qb">, - Intrinsic<[llvm_i32_ty], [llvm_v4i8_ty, llvm_v4i8_ty], - [IntrNoMem, Commutative]>; + Intrinsic<[llvm_i32_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [Commutative]>; def int_mips_cmpgu_lt_qb: GCCBuiltin<"__builtin_mips_cmpgu_lt_qb">, - Intrinsic<[llvm_i32_ty], [llvm_v4i8_ty, llvm_v4i8_ty], - [IntrNoMem, Commutative]>; + Intrinsic<[llvm_i32_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [Commutative]>; def int_mips_cmpgu_le_qb: GCCBuiltin<"__builtin_mips_cmpgu_le_qb">, - Intrinsic<[llvm_i32_ty], [llvm_v4i8_ty, llvm_v4i8_ty], - [IntrNoMem, Commutative]>; + Intrinsic<[llvm_i32_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [Commutative]>; def int_mips_cmp_eq_ph: GCCBuiltin<"__builtin_mips_cmp_eq_ph">, - Intrinsic<[], [mips_v2q15_ty, mips_v2q15_ty], [IntrNoMem, Commutative]>; + Intrinsic<[], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>; def int_mips_cmp_lt_ph: GCCBuiltin<"__builtin_mips_cmp_lt_ph">, - Intrinsic<[], [mips_v2q15_ty, mips_v2q15_ty], [IntrNoMem, Commutative]>; + Intrinsic<[], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>; def int_mips_cmp_le_ph: GCCBuiltin<"__builtin_mips_cmp_le_ph">, - Intrinsic<[], [mips_v2q15_ty, mips_v2q15_ty], [IntrNoMem, Commutative]>; + Intrinsic<[], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>; //===----------------------------------------------------------------------===// // Extracting def int_mips_extr_s_h: GCCBuiltin<"__builtin_mips_extr_s_h">, - Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], []>; def int_mips_extr_w: GCCBuiltin<"__builtin_mips_extr_w">, - Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], []>; def int_mips_extr_rs_w: GCCBuiltin<"__builtin_mips_extr_rs_w">, - Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], []>; def int_mips_extr_r_w: GCCBuiltin<"__builtin_mips_extr_r_w">, - Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], []>; def int_mips_extp: GCCBuiltin<"__builtin_mips_extp">, - Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], []>; def int_mips_extpdp: GCCBuiltin<"__builtin_mips_extpdp">, - Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], []>; //===----------------------------------------------------------------------===// // Misc def int_mips_wrdsp: GCCBuiltin<"__builtin_mips_wrdsp">, - Intrinsic<[], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[], [llvm_i32_ty, llvm_i32_ty], []>; def int_mips_rddsp: GCCBuiltin<"__builtin_mips_rddsp">, - Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrReadMem]>; def int_mips_insv: GCCBuiltin<"__builtin_mips_insv">, - Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrReadMem]>; def int_mips_bitrev: GCCBuiltin<"__builtin_mips_bitrev">, Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>; @@ -267,15 +245,15 @@ def int_mips_repl_ph: GCCBuiltin<"__builtin_mips_repl_ph">, Intrinsic<[mips_v2q15_ty], [llvm_i32_ty], [IntrNoMem]>; def int_mips_pick_qb: GCCBuiltin<"__builtin_mips_pick_qb">, - Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [IntrNoMem]>; + Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [IntrReadMem]>; def int_mips_pick_ph: GCCBuiltin<"__builtin_mips_pick_ph">, - Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [IntrNoMem]>; + Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [IntrReadMem]>; def int_mips_mthlip: GCCBuiltin<"__builtin_mips_mthlip">, - Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty], []>; def int_mips_bposge32: GCCBuiltin<"__builtin_mips_bposge32">, - Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>; + Intrinsic<[llvm_i32_ty], [], [IntrReadMem]>; def int_mips_lbux: GCCBuiltin<"__builtin_mips_lbux">, Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadArgMem]>; diff --git a/include/llvm/MC/MCFixedLenDisassembler.h b/include/llvm/MC/MCFixedLenDisassembler.h new file mode 100644 index 0000000..22b3c32 --- /dev/null +++ b/include/llvm/MC/MCFixedLenDisassembler.h @@ -0,0 +1,32 @@ +//===-- llvm/MC/MCFixedLenDisassembler.h - Decoder driver -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// Fixed length disassembler decoder state machine driver. +//===----------------------------------------------------------------------===// +#ifndef MCFIXEDLENDISASSEMBLER_H +#define MCFIXEDLENDISASSEMBLER_H + +namespace llvm { + +namespace MCD { +// Disassembler state machine opcodes. +enum DecoderOps { + OPC_ExtractField = 1, // OPC_ExtractField(uint8_t Start, uint8_t Len) + OPC_FilterValue, // OPC_FilterValue(uleb128 Val, uint16_t NumToSkip) + OPC_CheckField, // OPC_CheckField(uint8_t Start, uint8_t Len, + // uleb128 Val, uint16_t NumToSkip) + OPC_CheckPredicate, // OPC_CheckPredicate(uleb128 PIdx, uint16_t NumToSkip) + OPC_Decode, // OPC_Decode(uleb128 Opcode, uleb128 DIdx) + OPC_SoftFail, // OPC_SoftFail(uleb128 PMask, uleb128 NMask) + OPC_Fail // OPC_Fail() +}; + +} // namespace MCDecode +} // namespace llvm + +#endif diff --git a/include/llvm/MC/MCInstrDesc.h b/include/llvm/MC/MCInstrDesc.h index 186612d..dbf16d8 100644 --- a/include/llvm/MC/MCInstrDesc.h +++ b/include/llvm/MC/MCInstrDesc.h @@ -107,6 +107,7 @@ namespace MCID { Compare, MoveImm, Bitcast, + Select, DelaySlot, FoldableAsLoad, MayLoad, @@ -282,6 +283,12 @@ public: return Flags & (1 << MCID::Bitcast); } + /// isSelect - Return true if this is a select instruction. + /// + bool isSelect() const { + return Flags & (1 << MCID::Select); + } + /// isNotDuplicable - Return true if this instruction cannot be safely /// duplicated. For example, if the instruction has a unique labels attached /// to it, duplicating it would cause multiple definition errors. diff --git a/include/llvm/MC/MCObjectWriter.h b/include/llvm/MC/MCObjectWriter.h index 6e44e6c..9591a00 100644 --- a/include/llvm/MC/MCObjectWriter.h +++ b/include/llvm/MC/MCObjectWriter.h @@ -182,11 +182,6 @@ public: /// @} - /// Utility function to encode a SLEB128 value. - static void EncodeSLEB128(int64_t Value, raw_ostream &OS); - /// Utility function to encode a ULEB128 value. - static void EncodeULEB128(uint64_t Value, raw_ostream &OS, - unsigned Padding = 0); }; } // End llvm namespace diff --git a/include/llvm/MC/MCRegisterInfo.h b/include/llvm/MC/MCRegisterInfo.h index c541f05..46a9d71 100644 --- a/include/llvm/MC/MCRegisterInfo.h +++ b/include/llvm/MC/MCRegisterInfo.h @@ -111,6 +111,10 @@ struct MCRegisterDesc { uint32_t SubRegs; // Sub-register set, described above uint32_t SuperRegs; // Super-register set, described above + // Offset into MCRI::SubRegIndices of a list of sub-register indices for each + // sub-register in SubRegs. + uint32_t SubRegIndices; + // RegUnits - Points to the list of register units. The low 4 bits holds the // Scale, the high bits hold an offset into DiffLists. See MCRegUnitIterator. uint32_t RegUnits; @@ -148,7 +152,6 @@ private: unsigned NumClasses; // Number of entries in the array unsigned NumRegUnits; // Number of regunits. const uint16_t (*RegUnitRoots)[2]; // Pointer to regunit root table. - const uint16_t *RegLists; // Pointer to the reglists array const uint16_t *DiffLists; // Pointer to the difflists array const char *RegStrings; // Pointer to the string table. const uint16_t *SubRegIndices; // Pointer to the subreg lookup @@ -168,25 +171,6 @@ private: DenseMap<unsigned, int> L2SEHRegs; // LLVM to SEH regs mapping public: - /// RegListIterator. This iterator class is used to traverse lists of - /// super-registers, sub-registers, and overlapping registers. Don't use it - /// directly, use one of the sub-classes defined below. - class RegListIterator { - const uint16_t *Pos; - public: - explicit RegListIterator(const uint16_t *Table) - : Pos(Table) {} - - /// isValid - Return false when the end of the list is reached. - bool isValid() const { return *Pos; } - - /// Dereference the iterator to get the current register. - unsigned operator*() const { return *Pos; } - - /// Pre-increment. Move to the next register. - void operator++() { ++Pos; } - }; - /// DiffListIterator - Base iterator class that can traverse the /// differentially encoded register and regunit lists in DiffLists. /// Don't use this class directly, use one of the specialized sub-classes @@ -233,8 +217,8 @@ public: } }; - // These iterators are allowed to sub-class RegListIterator and - // DiffListIterator and access internal list pointers. + // These iterators are allowed to sub-class DiffListIterator and access + // internal list pointers. friend class MCSubRegIterator; friend class MCSuperRegIterator; friend class MCRegAliasIterator; @@ -247,7 +231,6 @@ public: const MCRegisterClass *C, unsigned NC, const uint16_t (*RURoots)[2], unsigned NRU, - const uint16_t *RL, const uint16_t *DL, const char *Strings, const uint16_t *SubIndices, @@ -257,7 +240,6 @@ public: NumRegs = NR; RAReg = RA; Classes = C; - RegLists = RL; DiffLists = DL; RegStrings = Strings; NumClasses = NC; @@ -327,9 +309,7 @@ public: /// getSubReg - Returns the physical register number of sub-register "Index" /// for physical register RegNo. Return zero if the sub-register does not /// exist. - unsigned getSubReg(unsigned Reg, unsigned Idx) const { - return *(SubRegIndices + (Reg - 1) * NumSubRegIndices + Idx - 1); - } + unsigned getSubReg(unsigned Reg, unsigned Idx) const; /// getMatchingSuperReg - Return a super-register of the specified register /// Reg so its sub-register of index SubIdx is Reg. @@ -339,12 +319,7 @@ public: /// getSubRegIndex - For a given register pair, return the sub-register index /// if the second register is a sub-register of the first. Return zero /// otherwise. - unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const { - for (unsigned I = 1; I <= NumSubRegIndices; ++I) - if (getSubReg(RegNo, I) == SubRegNo) - return I; - return 0; - } + unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const; /// getName - Return the human-readable symbolic target-specific name for the /// specified physical register. @@ -369,36 +344,15 @@ public: /// number. Returns -1 if there is no equivalent value. The second /// parameter allows targets to use different numberings for EH info and /// debugging info. - int getDwarfRegNum(unsigned RegNum, bool isEH) const { - const DwarfLLVMRegPair *M = isEH ? EHL2DwarfRegs : L2DwarfRegs; - unsigned Size = isEH ? EHL2DwarfRegsSize : L2DwarfRegsSize; - - DwarfLLVMRegPair Key = { RegNum, 0 }; - const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key); - if (I == M+Size || I->FromReg != RegNum) - return -1; - return I->ToReg; - } + int getDwarfRegNum(unsigned RegNum, bool isEH) const; /// getLLVMRegNum - Map a dwarf register back to a target register. /// - int getLLVMRegNum(unsigned RegNum, bool isEH) const { - const DwarfLLVMRegPair *M = isEH ? EHDwarf2LRegs : Dwarf2LRegs; - unsigned Size = isEH ? EHDwarf2LRegsSize : Dwarf2LRegsSize; - - DwarfLLVMRegPair Key = { RegNum, 0 }; - const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key); - assert(I != M+Size && I->FromReg == RegNum && "Invalid RegNum"); - return I->ToReg; - } + int getLLVMRegNum(unsigned RegNum, bool isEH) const; /// getSEHRegNum - Map a target register to an equivalent SEH register /// number. Returns LLVM register number if there is no equivalent value. - int getSEHRegNum(unsigned RegNum) const { - const DenseMap<unsigned, int>::const_iterator I = L2SEHRegs.find(RegNum); - if (I == L2SEHRegs.end()) return (int)RegNum; - return I->second; - } + int getSEHRegNum(unsigned RegNum) const; regclass_iterator regclass_begin() const { return Classes; } regclass_iterator regclass_end() const { return Classes+NumClasses; } @@ -431,37 +385,36 @@ public: // aliasing registers. Use these iterator classes to traverse the lists. /// MCSubRegIterator enumerates all sub-registers of Reg. -class MCSubRegIterator : public MCRegisterInfo::RegListIterator { +class MCSubRegIterator : public MCRegisterInfo::DiffListIterator { public: - MCSubRegIterator(unsigned Reg, const MCRegisterInfo *MCRI) - : RegListIterator(MCRI->RegLists + MCRI->get(Reg).SubRegs) {} + MCSubRegIterator(unsigned Reg, const MCRegisterInfo *MCRI) { + init(Reg, MCRI->DiffLists + MCRI->get(Reg).SubRegs); + ++*this; + } }; /// MCSuperRegIterator enumerates all super-registers of Reg. -class MCSuperRegIterator : public MCRegisterInfo::RegListIterator { +class MCSuperRegIterator : public MCRegisterInfo::DiffListIterator { public: - MCSuperRegIterator(unsigned Reg, const MCRegisterInfo *MCRI) - : RegListIterator(MCRI->RegLists + MCRI->get(Reg).SuperRegs) {} + MCSuperRegIterator(unsigned Reg, const MCRegisterInfo *MCRI) { + init(Reg, MCRI->DiffLists + MCRI->get(Reg).SuperRegs); + ++*this; + } }; /// MCRegAliasIterator enumerates all registers aliasing Reg. /// If IncludeSelf is set, Reg itself is included in the list. -class MCRegAliasIterator : public MCRegisterInfo::RegListIterator { +class MCRegAliasIterator : public MCRegisterInfo::DiffListIterator { public: - MCRegAliasIterator(unsigned Reg, const MCRegisterInfo *MCRI, bool IncludeSelf) - : RegListIterator(MCRI->RegLists + MCRI->get(Reg).Overlaps + !IncludeSelf) - {} + MCRegAliasIterator(unsigned Reg, const MCRegisterInfo *MCRI, + bool IncludeSelf) { + init(Reg, MCRI->DiffLists + MCRI->get(Reg).Overlaps); + // Initially, the iterator points to Reg itself. + if (!IncludeSelf) + ++*this; + } }; -inline -unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx, - const MCRegisterClass *RC) const { - for (MCSuperRegIterator Supers(Reg, this); Supers.isValid(); ++Supers) - if (Reg == getSubReg(*Supers, SubIdx) && RC->contains(*Supers)) - return *Supers; - return 0; -} - //===----------------------------------------------------------------------===// // Register Units //===----------------------------------------------------------------------===// diff --git a/include/llvm/MC/MCSchedule.h b/include/llvm/MC/MCSchedule.h index 49e3fee..3b1cdf1 100644 --- a/include/llvm/MC/MCSchedule.h +++ b/include/llvm/MC/MCSchedule.h @@ -78,6 +78,11 @@ public: unsigned HighLatency; static const unsigned DefaultHighLatency = 10; + // MispredictPenalty is the typical number of extra cycles the processor + // takes to recover from a branch misprediction. + unsigned MispredictPenalty; + static const unsigned DefaultMispredictPenalty = 10; + private: // TODO: Add a reference to proc resource types and sched resource tables. @@ -90,17 +95,18 @@ public: // target code can use it in static initializers. The defaults need to be // initialized in this default ctor because some clients directly instantiate // MCSchedModel instead of using a generated itinerary. - MCSchedModel(): IssueWidth(DefaultMinLatency), + MCSchedModel(): IssueWidth(DefaultIssueWidth), MinLatency(DefaultMinLatency), LoadLatency(DefaultLoadLatency), HighLatency(DefaultHighLatency), + MispredictPenalty(DefaultMispredictPenalty), InstrItineraries(0) {} // Table-gen driven ctor. - MCSchedModel(unsigned iw, int ml, unsigned ll, unsigned hl, + MCSchedModel(unsigned iw, int ml, unsigned ll, unsigned hl, unsigned mp, const InstrItinerary *ii): IssueWidth(iw), MinLatency(ml), LoadLatency(ll), HighLatency(hl), - InstrItineraries(ii){} + MispredictPenalty(mp), InstrItineraries(ii){} }; } // End llvm namespace diff --git a/include/llvm/MC/MCTargetAsmParser.h b/include/llvm/MC/MCTargetAsmParser.h index 4e3fd0d..91b604b 100644 --- a/include/llvm/MC/MCTargetAsmParser.h +++ b/include/llvm/MC/MCTargetAsmParser.h @@ -79,6 +79,22 @@ public: /// \param DirectiveID - the identifier token of the directive. virtual bool ParseDirective(AsmToken DirectiveID) = 0; + /// MatchInstruction - Recognize a series of operands of a parsed instruction + /// as an actual MCInst. This returns false on success and returns true on + /// failure to match. + /// + /// On failure, the target parser is responsible for emitting a diagnostic + /// explaining the match failure. + virtual bool + MatchInstruction(SMLoc IDLoc, + SmallVectorImpl<MCParsedAsmOperand*> &Operands, + SmallVectorImpl<MCInst> &MCInsts, + unsigned &OrigErrorInfo, + bool matchingInlineAsm = false) { + OrigErrorInfo = ~0x0; + return true; + } + /// MatchAndEmitInstruction - Recognize a series of operands of a parsed /// instruction as an actual MCInst and emit it to the specified MCStreamer. /// This returns false on success and returns true on failure to match. diff --git a/include/llvm/Module.h b/include/llvm/Module.h index cb7c1dc..e6303ac 100644 --- a/include/llvm/Module.h +++ b/include/llvm/Module.h @@ -301,11 +301,6 @@ public: typedef DenseMap<StructType*, unsigned, DenseMapInfo<StructType*> > NumeredTypesMapTy; - /// findUsedStructTypes - Walk the entire module and find all of the - /// struct types that are in use, returning them in a vector. - void findUsedStructTypes(std::vector<StructType*> &StructTypes, - bool OnlyNamed = false) const; - /// getTypeByName - Return the type with the specified name, or null if there /// is none by that name. StructType *getTypeByName(StringRef Name) const; diff --git a/include/llvm/Object/ELF.h b/include/llvm/Object/ELF.h index 30a88dc..ba0030d 100644 --- a/include/llvm/Object/ELF.h +++ b/include/llvm/Object/ELF.h @@ -507,9 +507,6 @@ private: const Elf_Rela *getRela(DataRefImpl Rela) const; const char *getString(uint32_t section, uint32_t offset) const; const char *getString(const Elf_Shdr *section, uint32_t offset) const; - error_code getSymbolName(const Elf_Shdr *section, - const Elf_Sym *Symb, - StringRef &Res) const; error_code getSymbolVersion(const Elf_Shdr *section, const Elf_Sym *Symb, StringRef &Version, @@ -521,6 +518,11 @@ protected: void validateSymbol(DataRefImpl Symb) const; public: + error_code getSymbolName(const Elf_Shdr *section, + const Elf_Sym *Symb, + StringRef &Res) const; + error_code getSectionName(const Elf_Shdr *section, + StringRef &Res) const; const Elf_Dyn *getDyn(DataRefImpl DynData) const; error_code getSymbolVersion(SymbolRef Symb, StringRef &Version, bool &IsDefault) const; @@ -599,11 +601,15 @@ public: virtual StringRef getObjectType() const { return "ELF"; } virtual unsigned getArch() const; virtual StringRef getLoadName() const; + virtual error_code getSectionContents(const Elf_Shdr *sec, + StringRef &Res) const; uint64_t getNumSections() const; uint64_t getStringTableIndex() const; ELF::Elf64_Word getSymbolTableIndex(const Elf_Sym *symb) const; const Elf_Shdr *getSection(const Elf_Sym *symb) const; + const Elf_Shdr *getElfSection(section_iterator &It) const; + const Elf_Sym *getElfSymbol(symbol_iterator &It) const; // Methods for type inquiry through isa, cast, and dyn_cast bool isDyldType() const { return isDyldELFObject; } @@ -785,6 +791,21 @@ ELFObjectFile<target_endianness, is64Bits> } template<support::endianness target_endianness, bool is64Bits> +const typename ELFObjectFile<target_endianness, is64Bits>::Elf_Shdr * +ELFObjectFile<target_endianness, is64Bits> + ::getElfSection(section_iterator &It) const { + llvm::object::DataRefImpl ShdrRef = It->getRawDataRefImpl(); + return reinterpret_cast<const Elf_Shdr *>(ShdrRef.p); +} + +template<support::endianness target_endianness, bool is64Bits> +const typename ELFObjectFile<target_endianness, is64Bits>::Elf_Sym * +ELFObjectFile<target_endianness, is64Bits> + ::getElfSymbol(symbol_iterator &It) const { + return getSymbol(It->getRawDataRefImpl()); +} + +template<support::endianness target_endianness, bool is64Bits> error_code ELFObjectFile<target_endianness, is64Bits> ::getSymbolFileOffset(DataRefImpl Symb, uint64_t &Result) const { @@ -1062,6 +1083,15 @@ error_code ELFObjectFile<target_endianness, is64Bits> template<support::endianness target_endianness, bool is64Bits> error_code ELFObjectFile<target_endianness, is64Bits> + ::getSectionContents(const Elf_Shdr *Sec, + StringRef &Result) const { + const char *start = (const char*)base() + Sec->sh_offset; + Result = StringRef(start, Sec->sh_size); + return object_error::success; +} + +template<support::endianness target_endianness, bool is64Bits> +error_code ELFObjectFile<target_endianness, is64Bits> ::getSectionAlignment(DataRefImpl Sec, uint64_t &Result) const { const Elf_Shdr *sec = reinterpret_cast<const Elf_Shdr *>(Sec.p); @@ -2016,6 +2046,9 @@ unsigned ELFObjectFile<target_endianness, is64Bits>::getArch() const { return Triple::arm; case ELF::EM_HEXAGON: return Triple::hexagon; + case ELF::EM_MIPS: + return (target_endianness == support::little) ? + Triple::mipsel : Triple::mips; default: return Triple::UnknownArch; } @@ -2155,6 +2188,14 @@ error_code ELFObjectFile<target_endianness, is64Bits> template<support::endianness target_endianness, bool is64Bits> error_code ELFObjectFile<target_endianness, is64Bits> + ::getSectionName(const Elf_Shdr *section, + StringRef &Result) const { + Result = StringRef(getString(dot_shstrtab_sec, section->sh_name)); + return object_error::success; +} + +template<support::endianness target_endianness, bool is64Bits> +error_code ELFObjectFile<target_endianness, is64Bits> ::getSymbolVersion(const Elf_Shdr *section, const Elf_Sym *symb, StringRef &Version, diff --git a/include/llvm/Object/MachOFormat.h b/include/llvm/Object/MachOFormat.h index f30d431..e4bfcc6 100644 --- a/include/llvm/Object/MachOFormat.h +++ b/include/llvm/Object/MachOFormat.h @@ -273,6 +273,10 @@ namespace macho { uint16_t Flags; uint32_t Value; }; + // Despite containing a uint64_t, this structure is only 4-byte aligned within + // a MachO file. +#pragma pack(push) +#pragma pack(4) struct Symbol64TableEntry { uint32_t StringIndex; uint8_t Type; @@ -280,6 +284,7 @@ namespace macho { uint16_t Flags; uint64_t Value; }; +#pragma pack(pop) /// @} /// @name Data-in-code Table Entry diff --git a/include/llvm/Support/AlignOf.h b/include/llvm/Support/AlignOf.h index 85607c8..cf71251 100644 --- a/include/llvm/Support/AlignOf.h +++ b/include/llvm/Support/AlignOf.h @@ -107,8 +107,8 @@ LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(8192); // Any larger and MSVC complains. #undef LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT -/// \brief This class template exposes a typedef for type containing a suitable -/// aligned character array to hold elements of any of up to four types. +/// \brief This union template exposes a suitably aligned and sized character +/// array member which can hold elements of any of up to four types. /// /// These types may be arrays, structs, or any other types. The goal is to /// produce a union type containing a character array which, when used, forms @@ -116,7 +116,8 @@ LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(8192); /// than four types can be added at the cost of more boiler plate. template <typename T1, typename T2 = char, typename T3 = char, typename T4 = char> -class AlignedCharArray { +union AlignedCharArrayUnion { +private: class AlignerImpl { T1 t1; T2 t2; T3 t3; T4 t4; @@ -127,6 +128,12 @@ class AlignedCharArray { }; public: + /// \brief The character array buffer for use by clients. + /// + /// No other member of this union should be referenced. The exist purely to + /// constrain the layout of this character array. + char buffer[sizeof(SizerImpl)]; + // Sadly, Clang and GCC both fail to align a character array properly even // with an explicit alignment attribute. To work around this, we union // the character array that will actually be used with a struct that contains @@ -134,16 +141,10 @@ public: // and GCC will properly register the alignment of a struct containing an // aligned member, and this alignment should carry over to the character // array in the union. - union union_type { - // This is the only member of the union which should be used by clients: - char buffer[sizeof(SizerImpl)]; - - // This member of the union only exists to force the alignment. - struct { - typename llvm::AlignedCharArrayImpl<AlignOf<AlignerImpl>::Alignment>::type - nonce_inner_member; - } nonce_member; - }; + struct { + typename llvm::AlignedCharArrayImpl<AlignOf<AlignerImpl>::Alignment>::type + nonce_inner_member; + } nonce_member; }; } // end namespace llvm diff --git a/include/llvm/Support/COFF.h b/include/llvm/Support/COFF.h index b18ba2b..ba8adb0 100644 --- a/include/llvm/Support/COFF.h +++ b/include/llvm/Support/COFF.h @@ -50,6 +50,8 @@ namespace COFF { }; enum MachineTypes { + MT_Invalid = 0xffff, + IMAGE_FILE_MACHINE_UNKNOWN = 0x0, IMAGE_FILE_MACHINE_AM33 = 0x13, IMAGE_FILE_MACHINE_AMD64 = 0x8664, @@ -74,6 +76,8 @@ namespace COFF { }; enum Characteristics { + C_Invalid = 0, + /// The file does not contain base relocations and must be loaded at its /// preferred base. If this cannot be done, the loader will error. IMAGE_FILE_RELOCS_STRIPPED = 0x0001, @@ -138,6 +142,8 @@ namespace COFF { /// Storage class tells where and what the symbol represents enum SymbolStorageClass { + SSC_Invalid = 0xff, + IMAGE_SYM_CLASS_END_OF_FUNCTION = -1, ///< Physical end of function IMAGE_SYM_CLASS_NULL = 0, ///< No symbol IMAGE_SYM_CLASS_AUTOMATIC = 1, ///< Stack variable @@ -214,6 +220,8 @@ namespace COFF { }; enum SectionCharacteristics { + SC_Invalid = 0xffffffff, + IMAGE_SCN_TYPE_NO_PAD = 0x00000008, IMAGE_SCN_CNT_CODE = 0x00000020, IMAGE_SCN_CNT_INITIALIZED_DATA = 0x00000040, diff --git a/include/llvm/Support/Compiler.h b/include/llvm/Support/Compiler.h index f654f32..ea0a4da 100644 --- a/include/llvm/Support/Compiler.h +++ b/include/llvm/Support/Compiler.h @@ -38,6 +38,25 @@ #define llvm_move(value) (value) #endif +/// LLVM_DELETED_FUNCTION - Expands to = delete if the compiler supports it. +/// Use to mark functions as uncallable. Member functions with this should +/// be declared private so that some behaivor is kept in C++03 mode. +/// +/// class DontCopy { +/// private: +/// DontCopy(const DontCopy&) LLVM_DELETED_FUNCTION; +/// DontCopy &operator =(const DontCopy&) LLVM_DELETED_FUNCTION; +/// public: +/// ... +/// }; +#if (__has_feature(cxx_deleted_functions) \ + || defined(__GXX_EXPERIMENTAL_CXX0X__)) + // No version of MSVC currently supports this. +#define LLVM_DELETED_FUNCTION = delete +#else +#define LLVM_DELETED_FUNCTION +#endif + /// LLVM_LIBRARY_VISIBILITY - If a class marked with this attribute is linked /// into a shared library, then the class should be private to the library and /// not accessible from outside it. Can also be used to mark variables and @@ -168,4 +187,13 @@ # define LLVM_BUILTIN_UNREACHABLE __builtin_unreachable() #endif +// LLVM_BUILTIN_TRAP - On compilers which support it, expands to an expression +// which causes the program to exit abnormally. +#if defined(__clang__) || (__GNUC__ > 4) \ + || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3) +# define LLVM_BUILTIN_TRAP __builtin_trap() +#else +# define LLVM_BUILTIN_TRAP *(volatile int*)0x11 = 0 +#endif + #endif diff --git a/include/llvm/Support/DataTypes.h.cmake b/include/llvm/Support/DataTypes.h.cmake index a3a6489..7484abd 100644 --- a/include/llvm/Support/DataTypes.h.cmake +++ b/include/llvm/Support/DataTypes.h.cmake @@ -79,18 +79,6 @@ typedef u_int64_t uint64_t; #endif #endif -#ifdef _OpenBSD_ -#define INT8_MAX 127 -#define INT8_MIN -128 -#define UINT8_MAX 255 -#define INT16_MAX 32767 -#define INT16_MIN -32768 -#define UINT16_MAX 65535 -#define INT32_MAX 2147483647 -#define INT32_MIN -2147483648 -#define UINT32_MAX 4294967295U -#endif - #else /* _MSC_VER */ /* Visual C++ doesn't provide standard integer headers, but it does provide built-in data types. */ diff --git a/include/llvm/Support/DataTypes.h.in b/include/llvm/Support/DataTypes.h.in index b492bb1..b9fb48a 100644 --- a/include/llvm/Support/DataTypes.h.in +++ b/include/llvm/Support/DataTypes.h.in @@ -79,18 +79,6 @@ typedef u_int64_t uint64_t; #endif #endif -#ifdef _OpenBSD_ -#define INT8_MAX 127 -#define INT8_MIN -128 -#define UINT8_MAX 255 -#define INT16_MAX 32767 -#define INT16_MIN -32768 -#define UINT16_MAX 65535 -#define INT32_MAX 2147483647 -#define INT32_MIN -2147483648 -#define UINT32_MAX 4294967295U -#endif - #else /* _MSC_VER */ /* Visual C++ doesn't provide standard integer headers, but it does provide built-in data types. */ diff --git a/include/llvm/Support/Debug.h b/include/llvm/Support/Debug.h index e723272..896fe84 100644 --- a/include/llvm/Support/Debug.h +++ b/include/llvm/Support/Debug.h @@ -19,7 +19,7 @@ // foo class. // // When compiling without assertions, the -debug-* options and all code in -// DEBUG() statements disappears, so it does not effect the runtime of the code. +// DEBUG() statements disappears, so it does not affect the runtime of the code. // //===----------------------------------------------------------------------===// @@ -49,11 +49,11 @@ extern bool DebugFlag; /// bool isCurrentDebugType(const char *Type); -/// SetCurrentDebugType - Set the current debug type, as if the -debug-only=X +/// setCurrentDebugType - Set the current debug type, as if the -debug-only=X /// option were specified. Note that DebugFlag also needs to be set to true for /// debug output to be produced. /// -void SetCurrentDebugType(const char *Type); +void setCurrentDebugType(const char *Type); /// DEBUG_WITH_TYPE macro - This macro should be used by passes to emit debug /// information. In the '-debug' option is specified on the commandline, and if @@ -70,7 +70,7 @@ void SetCurrentDebugType(const char *Type); #else #define isCurrentDebugType(X) (false) -#define SetCurrentDebugType(X) +#define setCurrentDebugType(X) #define DEBUG_WITH_TYPE(TYPE, X) do { } while (0) #endif diff --git a/include/llvm/Support/FileOutputBuffer.h b/include/llvm/Support/FileOutputBuffer.h new file mode 100644 index 0000000..0f07164 --- /dev/null +++ b/include/llvm/Support/FileOutputBuffer.h @@ -0,0 +1,97 @@ +//=== FileOutputBuffer.h - File Output Buffer -------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// Utility for creating a in-memory buffer that will be written to a file. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_FILEOUTPUTBUFFER_H +#define LLVM_SUPPORT_FILEOUTPUTBUFFER_H + +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/DataTypes.h" + +namespace llvm { + +class error_code; +template<class T> class OwningPtr; + +/// FileOutputBuffer - This interface provides simple way to create an in-memory +/// buffer which will be written to a file. During the lifetime of these +/// objects, the content or existence of the specified file is undefined. That +/// is, creating an OutputBuffer for a file may immediately remove the file. +/// If the FileOutputBuffer is committed, the target file's content will become +/// the buffer content at the time of the commit. If the FileOutputBuffer is +/// not committed, the file will be deleted in the FileOutputBuffer destructor. +class FileOutputBuffer { +public: + + enum { + F_executable = 1 /// set the 'x' bit on the resulting file + }; + + /// Factory method to create an OutputBuffer object which manages a read/write + /// buffer of the specified size. When committed, the buffer will be written + /// to the file at the specified path. + static error_code create(StringRef FilePath, size_t Size, + OwningPtr<FileOutputBuffer> &Result, + unsigned Flags=0); + + + /// Returns a pointer to the start of the buffer. + uint8_t *getBufferStart() const { + return BufferStart; + } + + /// Returns a pointer to the end of the buffer. + uint8_t *getBufferEnd() const { + return BufferEnd; + } + + /// Returns size of the buffer. + size_t getBufferSize() const { + return BufferEnd - BufferStart; + } + + /// Returns path where file will show up if buffer is committed. + StringRef getPath() const { + return FinalPath; + } + + /// Flushes the content of the buffer to its file and deallocates the + /// buffer. If commit() is not called before this object's destructor + /// is called, the file is deleted in the destructor. The optional parameter + /// is used if it turns out you want the file size to be smaller than + /// initially requested. + error_code commit(int64_t NewSmallerSize = -1); + + /// If this object was previously committed, the destructor just deletes + /// this object. If this object was not committed, the destructor + /// deallocates the buffer and the target file is never written. + ~FileOutputBuffer(); + + +protected: + FileOutputBuffer(const FileOutputBuffer &); // DO NOT IMPLEMENT + FileOutputBuffer &operator=(const FileOutputBuffer &); // DO NOT IMPLEMENT + FileOutputBuffer(uint8_t *Start, uint8_t *End, + StringRef Path, StringRef TempPath); + + uint8_t *BufferStart; + uint8_t *BufferEnd; + SmallString<128> FinalPath; + SmallString<128> TempPath; +}; + + + +} // end namespace llvm + +#endif diff --git a/include/llvm/Support/FileSystem.h b/include/llvm/Support/FileSystem.h index e0353f9..f4a9aa0 100644 --- a/include/llvm/Support/FileSystem.h +++ b/include/llvm/Support/FileSystem.h @@ -28,6 +28,7 @@ #define LLVM_SUPPORT_FILE_SYSTEM_H #include "llvm/ADT/IntrusiveRefCntPtr.h" +#include "llvm/ADT/OwningPtr.h" #include "llvm/ADT/SmallString.h" #include "llvm/ADT/Twine.h" #include "llvm/Support/DataTypes.h" @@ -576,6 +577,82 @@ error_code FindLibrary(const Twine &short_name, SmallVectorImpl<char> &result); error_code GetMainExecutable(const char *argv0, void *MainAddr, SmallVectorImpl<char> &result); +/// This class represents a memory mapped file. It is based on +/// boost::iostreams::mapped_file. +class mapped_file_region { + mapped_file_region() LLVM_DELETED_FUNCTION; + mapped_file_region(mapped_file_region&) LLVM_DELETED_FUNCTION; + mapped_file_region &operator =(mapped_file_region&) LLVM_DELETED_FUNCTION; + +public: + enum mapmode { + readonly, //< May only access map via const_data as read only. + readwrite, //< May access map via data and modify it. Written to path. + priv //< May modify via data, but changes are lost on destruction. + }; + +private: + /// Platform specific mapping state. + mapmode Mode; + uint64_t Size; + void *Mapping; +#if LLVM_ON_WIN32 + int FileDescriptor; + void *FileHandle; + void *FileMappingHandle; +#endif + + error_code init(int FD, uint64_t Offset); + +public: + typedef char char_type; + +#if LLVM_USE_RVALUE_REFERENCES + mapped_file_region(mapped_file_region&&); + mapped_file_region &operator =(mapped_file_region&&); +#endif + + /// Construct a mapped_file_region at \a path starting at \a offset of length + /// \a length and with access \a mode. + /// + /// \param path Path to the file to map. If it does not exist it will be + /// created. + /// \param mode How to map the memory. + /// \param length Number of bytes to map in starting at \a offset. If the file + /// is shorter than this, it will be extended. If \a length is + /// 0, the entire file will be mapped. + /// \param offset Byte offset from the beginning of the file where the map + /// should begin. Must be a multiple of + /// mapped_file_region::alignment(). + /// \param ec This is set to errc::success if the map was constructed + /// sucessfully. Otherwise it is set to a platform dependent error. + mapped_file_region(const Twine &path, + mapmode mode, + uint64_t length, + uint64_t offset, + error_code &ec); + + /// \param fd An open file descriptor to map. mapped_file_region takes + /// ownership. It must have been opended in the correct mode. + mapped_file_region(int fd, + mapmode mode, + uint64_t length, + uint64_t offset, + error_code &ec); + + ~mapped_file_region(); + + mapmode flags() const; + uint64_t size() const; + char *data() const; + + /// Get a const view of the data. Modifying this memory has undefined + /// behaivor. + const char *const_data() const; + + /// \returns The minimum alignment offset must be. + static int alignment(); +}; /// @brief Memory maps the contents of a file /// diff --git a/include/llvm/Support/InstVisitor.h b/include/llvm/Support/InstVisitor.h index 52de8f6..109b3cf 100644 --- a/include/llvm/Support/InstVisitor.h +++ b/include/llvm/Support/InstVisitor.h @@ -13,6 +13,8 @@ #include "llvm/Function.h" #include "llvm/Instructions.h" +#include "llvm/Intrinsics.h" +#include "llvm/IntrinsicInst.h" #include "llvm/Module.h" #include "llvm/Support/CallSite.h" #include "llvm/Support/ErrorHandling.h" @@ -145,14 +147,17 @@ public: // visitMul to proxy to visitBinaryOperator for instance in case the user does // not need this generality. // - // The one problem case we have to handle here though is that the PHINode - // class and opcode name are the exact same. Because of this, we cannot - // define visitPHINode (the inst version) to forward to visitPHINode (the - // generic version) without multiply defined symbols and recursion. To handle - // this, we do not autoexpand "Other" instructions, we do it manually. - // + // These functions can also implement fan-out, when a single opcode and + // instruction have multiple more specific Instruction subclasses. The Call + // instruction currently supports this. We implement that by redirecting that + // instruction to a special delegation helper. #define HANDLE_INST(NUM, OPCODE, CLASS) \ - RetTy visit##OPCODE(CLASS &I) { DELEGATE(CLASS); } + RetTy visit##OPCODE(CLASS &I) { \ + if (NUM == Instruction::Call) \ + return delegateCallInst(I); \ + else \ + DELEGATE(CLASS); \ + } #include "llvm/Instruction.def" // Specific Instruction type classes... note that all of the casts are @@ -195,6 +200,17 @@ public: RetTy visitInsertValueInst(InsertValueInst &I) { DELEGATE(Instruction); } RetTy visitLandingPadInst(LandingPadInst &I) { DELEGATE(Instruction); } + // Handle the special instrinsic instruction classes. + RetTy visitDbgDeclareInst(DbgDeclareInst &I) { DELEGATE(DbgInfoIntrinsic);} + RetTy visitDbgValueInst(DbgValueInst &I) { DELEGATE(DbgInfoIntrinsic);} + RetTy visitDbgInfoIntrinsic(DbgInfoIntrinsic &I) { DELEGATE(IntrinsicInst); } + RetTy visitMemSetInst(MemSetInst &I) { DELEGATE(MemIntrinsic); } + RetTy visitMemCpyInst(MemCpyInst &I) { DELEGATE(MemTransferInst); } + RetTy visitMemMoveInst(MemMoveInst &I) { DELEGATE(MemTransferInst); } + RetTy visitMemTransferInst(MemTransferInst &I) { DELEGATE(MemIntrinsic); } + RetTy visitMemIntrinsic(MemIntrinsic &I) { DELEGATE(IntrinsicInst); } + RetTy visitIntrinsicInst(IntrinsicInst &I) { DELEGATE(CallInst); } + // Call and Invoke are slightly different as they delegate first through // a generic CallSite visitor. RetTy visitCallInst(CallInst &I) { @@ -234,6 +250,29 @@ public: // Note that you MUST override this function if your return type is not void. // void visitInstruction(Instruction &I) {} // Ignore unhandled instructions + +private: + // Special helper function to delegate to CallInst subclass visitors. + RetTy delegateCallInst(CallInst &I) { + if (const Function *F = I.getCalledFunction()) { + switch ((Intrinsic::ID)F->getIntrinsicID()) { + default: DELEGATE(IntrinsicInst); + case Intrinsic::dbg_declare: DELEGATE(DbgDeclareInst); + case Intrinsic::dbg_value: DELEGATE(DbgValueInst); + case Intrinsic::memcpy: DELEGATE(MemCpyInst); + case Intrinsic::memmove: DELEGATE(MemMoveInst); + case Intrinsic::memset: DELEGATE(MemSetInst); + case Intrinsic::not_intrinsic: break; + } + } + DELEGATE(CallInst); + } + + // An overload that will never actually be called, it is used only from dead + // code in the dispatching from opcodes to instruction subclasses. + RetTy delegateCallInst(Instruction &I) { + llvm_unreachable("delegateCallInst called for non-CallInst"); + } }; #undef DELEGATE diff --git a/include/llvm/Support/LEB128.h b/include/llvm/Support/LEB128.h new file mode 100644 index 0000000..410edd4 --- /dev/null +++ b/include/llvm/Support/LEB128.h @@ -0,0 +1,95 @@ +//===- llvm/Support/LEB128.h - [SU]LEB128 utility functions -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares some utility functions for encoding SLEB128 and +// ULEB128 values. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SYSTEM_LEB128_H +#define LLVM_SYSTEM_LEB128_H + +#include <llvm/Support/raw_ostream.h> + +namespace llvm { + +/// Utility function to encode a SLEB128 value to an output stream. +static inline void encodeSLEB128(int64_t Value, raw_ostream &OS) { + bool More; + do { + uint8_t Byte = Value & 0x7f; + // NOTE: this assumes that this signed shift is an arithmetic right shift. + Value >>= 7; + More = !((((Value == 0 ) && ((Byte & 0x40) == 0)) || + ((Value == -1) && ((Byte & 0x40) != 0)))); + if (More) + Byte |= 0x80; // Mark this byte that that more bytes will follow. + OS << char(Byte); + } while (More); +} + +/// Utility function to encode a ULEB128 value to an output stream. +static inline void encodeULEB128(uint64_t Value, raw_ostream &OS, + unsigned Padding = 0) { + do { + uint8_t Byte = Value & 0x7f; + Value >>= 7; + if (Value != 0 || Padding != 0) + Byte |= 0x80; // Mark this byte that that more bytes will follow. + OS << char(Byte); + } while (Value != 0); + + // Pad with 0x80 and emit a null byte at the end. + if (Padding != 0) { + for (; Padding != 1; --Padding) + OS << '\x80'; + OS << '\x00'; + } +} + +/// Utility function to encode a ULEB128 value to a buffer. Returns +/// the length in bytes of the encoded value. +static inline unsigned encodeULEB128(uint64_t Value, uint8_t *p, + unsigned Padding = 0) { + uint8_t *orig_p = p; + do { + uint8_t Byte = Value & 0x7f; + Value >>= 7; + if (Value != 0 || Padding != 0) + Byte |= 0x80; // Mark this byte that that more bytes will follow. + *p++ = Byte; + } while (Value != 0); + + // Pad with 0x80 and emit a null byte at the end. + if (Padding != 0) { + for (; Padding != 1; --Padding) + *p++ = '\x80'; + *p++ = '\x00'; + } + return (unsigned)(p - orig_p); +} + + +/// Utility function to decode a ULEB128 value. +static inline uint64_t decodeULEB128(const uint8_t *p, unsigned *n = 0) { + const uint8_t *orig_p = p; + uint64_t Value = 0; + unsigned Shift = 0; + do { + Value += (*p & 0x7f) << Shift; + Shift += 7; + } while (*p++ >= 128); + if (n) + *n = (unsigned)(p - orig_p); + return Value; +} + +} // namespace llvm + +#endif // LLVM_SYSTEM_LEB128_H diff --git a/include/llvm/Support/NoFolder.h b/include/llvm/Support/NoFolder.h index 75c1a79..8e41a64 100644 --- a/include/llvm/Support/NoFolder.h +++ b/include/llvm/Support/NoFolder.h @@ -181,6 +181,12 @@ public: ArrayRef<Constant *> IdxList) const { return ConstantExpr::getGetElementPtr(C, IdxList); } + Constant *CreateGetElementPtr(Constant *C, Constant *Idx) const { + // This form of the function only exists to avoid ambiguous overload + // warnings about whether to convert Idx to ArrayRef<Constant *> or + // ArrayRef<Value *>. + return ConstantExpr::getGetElementPtr(C, Idx); + } Instruction *CreateGetElementPtr(Constant *C, ArrayRef<Value *> IdxList) const { return GetElementPtrInst::Create(C, IdxList); @@ -190,6 +196,12 @@ public: ArrayRef<Constant *> IdxList) const { return ConstantExpr::getInBoundsGetElementPtr(C, IdxList); } + Constant *CreateInBoundsGetElementPtr(Constant *C, Constant *Idx) const { + // This form of the function only exists to avoid ambiguous overload + // warnings about whether to convert Idx to ArrayRef<Constant *> or + // ArrayRef<Value *>. + return ConstantExpr::getInBoundsGetElementPtr(C, Idx); + } Instruction *CreateInBoundsGetElementPtr(Constant *C, ArrayRef<Value *> IdxList) const { return GetElementPtrInst::CreateInBounds(C, IdxList); diff --git a/include/llvm/Support/ValueHandle.h b/include/llvm/Support/ValueHandle.h index 6787633..61e21b8 100644 --- a/include/llvm/Support/ValueHandle.h +++ b/include/llvm/Support/ValueHandle.h @@ -110,11 +110,12 @@ protected: V != DenseMapInfo<Value *>::getTombstoneKey(); } -private: +public: // Callbacks made from Value. static void ValueIsDeleted(Value *V); static void ValueIsRAUWd(Value *Old, Value *New); +private: // Internal implementation details. ValueHandleBase **getPrevPtr() const { return PrevPair.getPointer(); } HandleBaseKind getKind() const { return PrevPair.getInt(); } diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td index 03adcce..c406bca 100644 --- a/include/llvm/Target/Target.td +++ b/include/llvm/Target/Target.td @@ -28,6 +28,24 @@ class SubRegIndex<list<SubRegIndex> comps = []> { // ComposedOf - A list of two SubRegIndex instances, [A, B]. // This indicates that this SubRegIndex is the result of composing A and B. list<SubRegIndex> ComposedOf = comps; + + // CoveringSubRegIndices - A list of two or more sub-register indexes that + // cover this sub-register. + // + // This field should normally be left blank as TableGen can infer it. + // + // TableGen automatically detects sub-registers that straddle the registers + // in the SubRegs field of a Register definition. For example: + // + // Q0 = dsub_0 -> D0, dsub_1 -> D1 + // Q1 = dsub_0 -> D2, dsub_1 -> D3 + // D1_D2 = dsub_0 -> D1, dsub_1 -> D2 + // QQ0 = qsub_0 -> Q0, qsub_1 -> Q1 + // + // TableGen will infer that D1_D2 is a sub-register of QQ0. It will be given + // the synthetic index dsub_1_dsub_2 unless some SubRegIndex is defined with + // CoveringSubRegIndices = [dsub_1, dsub_2]. + list<SubRegIndex> CoveringSubRegIndices = []; } // RegAltNameIndex - The alternate name set to use for register operands of @@ -64,18 +82,6 @@ class Register<string n, list<string> altNames = []> { // register. list<RegAltNameIndex> RegAltNameIndices = []; - // CompositeIndices - Specify subreg indices that don't correspond directly to - // a register in SubRegs and are not inherited. The following formats are - // supported: - // - // (a) Identity - Reg:a == Reg - // (a b) Alias - Reg:a == Reg:b - // (a b,c) Composite - Reg:a == (Reg:b):c - // - // This can be used to disambiguate a sub-sub-register that exists in more - // than one subregister and other weird stuff. - list<dag> CompositeIndices = []; - // DwarfNumbers - Numbers used internally by gcc/gdb to identify the register. // These values can be determined by locating the <target>.h file in the // directory llvmgcc/gcc/config/<target>/ and looking for REGISTER_NAMES. The @@ -252,9 +258,6 @@ class RegisterTuples<list<SubRegIndex> Indices, list<dag> Regs> { // SubRegIndices - N SubRegIndex instances. This provides the names of the // sub-registers in the synthesized super-registers. list<SubRegIndex> SubRegIndices = Indices; - - // Compose sub-register indices like in a normal Register. - list<dag> CompositeIndices = []; } @@ -336,6 +339,7 @@ class Instruction { bit isCompare = 0; // Is this instruction a comparison instruction? bit isMoveImm = 0; // Is this instruction a move immediate instruction? bit isBitcast = 0; // Is this instruction a bitcast instruction? + bit isSelect = 0; // Is this instruction a select instruction? bit isBarrier = 0; // Can control flow fall through this instruction? bit isCall = 0; // Is this instruction a call instruction? bit canFoldAsLoad = 0; // Can this be folded as a simple memory operand? @@ -749,6 +753,10 @@ class AsmParser { // function of the AsmParser class to call on every matched instruction. // This can be used to perform target specific instruction post-processing. string AsmParserInstCleanup = ""; + + //ShouldEmitMatchRegisterName - Set to false if the target needs a hand + //written register name matcher + bit ShouldEmitMatchRegisterName = 1; } def DefaultAsmParser : AsmParser; diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 73efc50..da30ab8 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -14,6 +14,7 @@ #ifndef LLVM_TARGET_TARGETINSTRINFO_H #define LLVM_TARGET_TARGETINSTRINFO_H +#include "llvm/ADT/SmallSet.h" #include "llvm/MC/MCInstrInfo.h" #include "llvm/CodeGen/DFAPacketizer.h" #include "llvm/CodeGen/MachineFunction.h" @@ -27,6 +28,7 @@ class MachineMemOperand; class MachineRegisterInfo; class MDNode; class MCInst; +class MCSchedModel; class SDNode; class ScheduleHazardRecognizer; class SelectionDAG; @@ -186,14 +188,6 @@ public: const MachineInstr *Orig, const TargetRegisterInfo &TRI) const = 0; - /// scheduleTwoAddrSource - Schedule the copy / re-mat of the source of the - /// two-addrss instruction inserted by two-address pass. - virtual void scheduleTwoAddrSource(MachineInstr *SrcMI, - MachineInstr *UseMI, - const TargetRegisterInfo &TRI) const { - // Do nothing. - } - /// duplicate - Create a duplicate of the Orig instruction in MF. This is like /// MachineFunction::CloneMachineInstr(), but the target may update operands /// that are required to be unique. @@ -419,6 +413,51 @@ public: llvm_unreachable("Target didn't implement TargetInstrInfo::insertSelect!"); } + /// analyzeSelect - Analyze the given select instruction, returning true if + /// it cannot be understood. It is assumed that MI->isSelect() is true. + /// + /// When successful, return the controlling condition and the operands that + /// determine the true and false result values. + /// + /// Result = SELECT Cond, TrueOp, FalseOp + /// + /// Some targets can optimize select instructions, for example by predicating + /// the instruction defining one of the operands. Such targets should set + /// Optimizable. + /// + /// @param MI Select instruction to analyze. + /// @param Cond Condition controlling the select. + /// @param TrueOp Operand number of the value selected when Cond is true. + /// @param FalseOp Operand number of the value selected when Cond is false. + /// @param Optimizable Returned as true if MI is optimizable. + /// @returns False on success. + virtual bool analyzeSelect(const MachineInstr *MI, + SmallVectorImpl<MachineOperand> &Cond, + unsigned &TrueOp, unsigned &FalseOp, + bool &Optimizable) const { + assert(MI && MI->isSelect() && "MI must be a select instruction"); + return true; + } + + /// optimizeSelect - Given a select instruction that was understood by + /// analyzeSelect and returned Optimizable = true, attempt to optimize MI by + /// merging it with one of its operands. Returns NULL on failure. + /// + /// When successful, returns the new select instruction. The client is + /// responsible for deleting MI. + /// + /// If both sides of the select can be optimized, PreferFalse is used to pick + /// a side. + /// + /// @param MI Optimizable select instruction. + /// @param PreferFalse Try to optimize FalseOp instead of TrueOp. + /// @returns Optimized instruction or NULL. + virtual MachineInstr *optimizeSelect(MachineInstr *MI, + bool PreferFalse = false) const { + // This function must be implemented if Optimizable is ever set. + llvm_unreachable("Target must implement TargetInstrInfo::optimizeSelect!"); + } + /// copyPhysReg - Emit instructions to copy a pair of physical registers. virtual void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, @@ -693,6 +732,20 @@ public: return false; } + /// optimizeLoadInstr - Try to remove the load by folding it to a register + /// operand at the use. We fold the load instructions if and only if the + /// def and use are in the same BB. We only look at one load and see + /// whether it can be folded into MI. FoldAsLoadDefReg is the virtual register + /// defined by the load we are trying to fold. DefMI returns the machine + /// instruction that defines FoldAsLoadDefReg, and the function returns + /// the machine instruction generated due to folding. + virtual MachineInstr* optimizeLoadInstr(MachineInstr *MI, + const MachineRegisterInfo *MRI, + unsigned &FoldAsLoadDefReg, + MachineInstr *&DefMI) const { + return 0; + } + /// FoldImmediate - 'Reg' is known to be defined by a move immediate /// instruction, try to fold the immediate into the use instruction. virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, @@ -775,7 +828,7 @@ public: SDNode *Node) const = 0; /// Return the default expected latency for a def based on it's opcode. - unsigned defaultDefLatency(const InstrItineraryData *ItinData, + unsigned defaultDefLatency(const MCSchedModel *SchedModel, const MachineInstr *DefMI) const; /// isHighLatencyDef - Return true if this opcode has high latency to its diff --git a/include/llvm/Target/TargetLibraryInfo.h b/include/llvm/Target/TargetLibraryInfo.h index c8cacf2..ea2874f 100644 --- a/include/llvm/Target/TargetLibraryInfo.h +++ b/include/llvm/Target/TargetLibraryInfo.h @@ -18,36 +18,47 @@ namespace llvm { namespace LibFunc { enum Func { + /// int __cxa_atexit(void (*f)(void *), void *p, void *d); + cxa_atexit, + /// void __cxa_guard_abort(guard_t *guard); + /// guard_t is int64_t in Itanium ABI or int32_t on ARM eabi. + cxa_guard_abort, + /// int __cxa_guard_acquire(guard_t *guard); + cxa_guard_acquire, + /// void __cxa_guard_release(guard_t *guard); + cxa_guard_release, + /// void *__memcpy_chk(void *s1, const void *s2, size_t n, size_t s1size); + memcpy_chk, /// double acos(double x); acos, - /// long double acosl(long double x); - acosl, /// float acosf(float x); acosf, + /// long double acosl(long double x); + acosl, /// double asin(double x); asin, - /// long double asinl(long double x); - asinl, /// float asinf(float x); asinf, + /// long double asinl(long double x); + asinl, /// double atan(double x); atan, - /// long double atanl(long double x); - atanl, - /// float atanf(float x); - atanf, /// double atan2(double y, double x); atan2, - /// long double atan2l(long double y, long double x); - atan2l, /// float atan2f(float y, float x); atan2f, + /// long double atan2l(long double y, long double x); + atan2l, + /// float atanf(float x); + atanf, + /// long double atanl(long double x); + atanl, /// double ceil(double x); ceil, - /// long double ceill(long double x); - ceill, /// float ceilf(float x); ceilf, + /// long double ceill(long double x); + ceill, /// double copysign(double x, double y); copysign, /// float copysignf(float x, float y); @@ -56,54 +67,56 @@ namespace llvm { copysignl, /// double cos(double x); cos, - /// long double cosl(long double x); - cosl, /// float cosf(float x); cosf, /// double cosh(double x); cosh, - /// long double coshl(long double x); - coshl, /// float coshf(float x); coshf, + /// long double coshl(long double x); + coshl, + /// long double cosl(long double x); + cosl, /// double exp(double x); exp, - /// long double expl(long double x); - expl, - /// float expf(float x); - expf, /// double exp2(double x); exp2, - /// long double exp2l(long double x); - exp2l, /// float exp2f(float x); exp2f, + /// long double exp2l(long double x); + exp2l, + /// float expf(float x); + expf, + /// long double expl(long double x); + expl, /// double expm1(double x); expm1, - /// long double expm1l(long double x); - expm1l, /// float expm1f(float x); expm1f, + /// long double expm1l(long double x); + expm1l, /// double fabs(double x); fabs, - /// long double fabsl(long double x); - fabsl, /// float fabsf(float x); fabsf, + /// long double fabsl(long double x); + fabsl, + /// int fiprintf(FILE *stream, const char *format, ...); + fiprintf, /// double floor(double x); floor, - /// long double floorl(long double x); - floorl, /// float floorf(float x); floorf, - /// int fiprintf(FILE *stream, const char *format, ...); - fiprintf, + /// long double floorl(long double x); + floorl, /// double fmod(double x, double y); fmod, - /// long double fmodl(long double x, long double y); - fmodl, /// float fmodf(float x, float y); fmodf, + /// long double fmodl(long double x, long double y); + fmodl, + /// int fputc(int c, FILE *stream); + fputc, /// int fputs(const char *s, FILE *stream); fputs, /// size_t fwrite(const void *ptr, size_t size, size_t nitems, @@ -113,28 +126,32 @@ namespace llvm { iprintf, /// double log(double x); log, - /// long double logl(long double x); - logl, - /// float logf(float x); - logf, - /// double log2(double x); - log2, - /// double long double log2l(long double x); - log2l, - /// float log2f(float x); - log2f, /// double log10(double x); log10, - /// long double log10l(long double x); - log10l, /// float log10f(float x); log10f, + /// long double log10l(long double x); + log10l, /// double log1p(double x); log1p, - /// long double log1pl(long double x); - log1pl, /// float log1pf(float x); log1pf, + /// long double log1pl(long double x); + log1pl, + /// double log2(double x); + log2, + /// float log2f(float x); + log2f, + /// double long double log2l(long double x); + log2l, + /// float logf(float x); + logf, + /// long double logl(long double x); + logl, + /// void *memchr(const void *s, int c, size_t n); + memchr, + /// int memcmp(const void *s1, const void *s2, size_t n); + memcmp, /// void *memcpy(void *s1, const void *s2, size_t n); memcpy, /// void *memmove(void *s1, const void *s2, size_t n); @@ -155,6 +172,10 @@ namespace llvm { powf, /// long double powl(long double x, long double y); powl, + /// int putchar(int c); + putchar, + /// int puts(const char *s); + puts, /// double rint(double x); rint, /// float rintf(float x); @@ -169,51 +190,58 @@ namespace llvm { roundl, /// double sin(double x); sin, - /// long double sinl(long double x); - sinl, /// float sinf(float x); sinf, /// double sinh(double x); sinh, - /// long double sinhl(long double x); - sinhl, /// float sinhf(float x); sinhf, + /// long double sinhl(long double x); + sinhl, + /// long double sinl(long double x); + sinl, /// int siprintf(char *str, const char *format, ...); siprintf, /// double sqrt(double x); sqrt, - /// long double sqrtl(long double x); - sqrtl, /// float sqrtf(float x); sqrtf, + /// long double sqrtl(long double x); + sqrtl, + /// char *strcat(char *s1, const char *s2); + strcat, + /// char *strchr(const char *s, int c); + strchr, + /// char *strcpy(char *s1, const char *s2); + strcpy, + /// size_t strlen(const char *s); + strlen, + /// char *strncat(char *s1, const char *s2, size_t n); + strncat, + /// int strncmp(const char *s1, const char *s2, size_t n); + strncmp, + /// char *strncpy(char *s1, const char *s2, size_t n); + strncpy, + /// size_t strnlen(const char *s, size_t maxlen); + strnlen, /// double tan(double x); tan, - /// long double tanl(long double x); - tanl, /// float tanf(float x); tanf, /// double tanh(double x); tanh, - /// long double tanhl(long double x); - tanhl, /// float tanhf(float x); tanhf, + /// long double tanhl(long double x); + tanhl, + /// long double tanl(long double x); + tanl, /// double trunc(double x); trunc, /// float truncf(float x); truncf, /// long double truncl(long double x); truncl, - /// int __cxa_atexit(void (*f)(void *), void *p, void *d); - cxa_atexit, - /// void __cxa_guard_abort(guard_t *guard); - /// guard_t is int64_t in Itanium ABI or int32_t on ARM eabi. - cxa_guard_abort, - /// int __cxa_guard_acquire(guard_t *guard); - cxa_guard_acquire, - /// void __cxa_guard_release(guard_t *guard); - cxa_guard_release, NumLibFuncs }; @@ -247,12 +275,41 @@ public: TargetLibraryInfo(const Triple &T); explicit TargetLibraryInfo(const TargetLibraryInfo &TLI); + /// getLibFunc - Search for a particular function name. If it is one of the + /// known library functions, return true and set F to the corresponding value. + bool getLibFunc(StringRef funcName, LibFunc::Func &F) const; + /// has - This function is used by optimizations that want to match on or form /// a given library function. bool has(LibFunc::Func F) const { return getState(F) != Unavailable; } + /// hasOptimizedCodeGen - Return true if the function is both available as + /// a builtin and a candidate for optimized code generation. + bool hasOptimizedCodeGen(LibFunc::Func F) const { + if (getState(F) == Unavailable) + return false; + switch (F) { + default: break; + case LibFunc::copysign: case LibFunc::copysignf: case LibFunc::copysignl: + case LibFunc::fabs: case LibFunc::fabsf: case LibFunc::fabsl: + case LibFunc::sin: case LibFunc::sinf: case LibFunc::sinl: + case LibFunc::cos: case LibFunc::cosf: case LibFunc::cosl: + case LibFunc::sqrt: case LibFunc::sqrtf: case LibFunc::sqrtl: + case LibFunc::floor: case LibFunc::floorf: case LibFunc::floorl: + case LibFunc::nearbyint: case LibFunc::nearbyintf: case LibFunc::nearbyintl: + case LibFunc::ceil: case LibFunc::ceilf: case LibFunc::ceill: + case LibFunc::rint: case LibFunc::rintf: case LibFunc::rintl: + case LibFunc::trunc: case LibFunc::truncf: case LibFunc::truncl: + case LibFunc::log2: case LibFunc::log2f: case LibFunc::log2l: + case LibFunc::exp2: case LibFunc::exp2f: case LibFunc::exp2l: + case LibFunc::memcmp: + return true; + } + return false; + } + StringRef getName(LibFunc::Func F) const { AvailabilityState State = getState(F); if (State == Unavailable) diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 7ad90ea..acf0419 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -51,6 +51,7 @@ namespace llvm { template<typename T> class SmallVectorImpl; class TargetData; class TargetRegisterClass; + class TargetLibraryInfo; class TargetLoweringObjectFile; class Value; @@ -365,7 +366,9 @@ public: /// for it. LegalizeAction getOperationAction(unsigned Op, EVT VT) const { if (VT.isExtended()) return Expand; - assert(Op < array_lengthof(OpActions[0]) && "Table isn't big enough!"); + // If a target-specific SDNode requires legalization, require the target + // to provide custom legalization for it. + if (Op > array_lengthof(OpActions[0])) return Custom; unsigned I = (unsigned) VT.getSimpleVT().SimpleTy; return (LegalizeAction)OpActions[I][Op]; } @@ -1413,7 +1416,8 @@ public: /// createFastISel - This method returns a target specific FastISel object, /// or null if the target does not support "fast" ISel. - virtual FastISel *createFastISel(FunctionLoweringInfo &) const { + virtual FastISel *createFastISel(FunctionLoweringInfo &, + const TargetLibraryInfo *) const { return 0; } diff --git a/include/llvm/Target/TargetOptions.h b/include/llvm/Target/TargetOptions.h index d1a07d1..68ca567 100644 --- a/include/llvm/Target/TargetOptions.h +++ b/include/llvm/Target/TargetOptions.h @@ -155,6 +155,10 @@ namespace llvm { /// automatically realigned, if needed. unsigned RealignStack : 1; + /// SSPBufferSize - The minimum size of buffers that will receive stack + /// smashing protection when -fstack-protection is used. + unsigned SSPBufferSize; + /// EnableFastISel - This flag enables fast-path instruction selection /// which trades away generated code quality in favor of reducing /// compile time. diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index a5bd7c9..df4d900 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -152,7 +152,7 @@ public: } /// getSuperRegIndices - Returns a 0-terminated list of sub-register indices - /// that projec some super-register class into this register class. The list + /// that project some super-register class into this register class. The list /// has an entry for each Idx such that: /// /// There exists SuperRC where: @@ -349,6 +349,14 @@ public: return false; } + /// hasRegUnit - Returns true if Reg contains RegUnit. + bool hasRegUnit(unsigned Reg, unsigned RegUnit) const { + for (MCRegUnitIterator Units(Reg, this); Units.isValid(); ++Units) + if (*Units == RegUnit) + return true; + return false; + } + /// isSubRegister - Returns true if regB is a sub-register of regA. /// bool isSubRegister(unsigned regA, unsigned regB) const { diff --git a/include/llvm/Target/TargetSchedule.td b/include/llvm/Target/TargetSchedule.td index 5bbed58..4dc488d 100644 --- a/include/llvm/Target/TargetSchedule.td +++ b/include/llvm/Target/TargetSchedule.td @@ -27,6 +27,7 @@ class SchedMachineModel { // (-1) inorder (0) ooo, (1): inorder +var latencies. int LoadLatency = -1; // Cycles for loads to access the cache. int HighLatency = -1; // Approximation of cycles for "high latency" ops. + int MispredictPenalty = -1; // Extra cycles for a mispredicted branch. ProcessorItineraries Itineraries = NoItineraries; diff --git a/include/llvm/Target/TargetSelectionDAG.td b/include/llvm/Target/TargetSelectionDAG.td index ff006b6..3f81c06 100644 --- a/include/llvm/Target/TargetSelectionDAG.td +++ b/include/llvm/Target/TargetSelectionDAG.td @@ -411,6 +411,9 @@ def prefetch : SDNode<"ISD::PREFETCH" , SDTPrefetch, [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>; +def readcyclecounter : SDNode<"ISD::READCYCLECOUNTER", SDTIntLeaf, + [SDNPHasChain, SDNPSideEffect]>; + def membarrier : SDNode<"ISD::MEMBARRIER" , SDTMemBarrier, [SDNPHasChain, SDNPSideEffect]>; diff --git a/include/llvm/Transforms/Utils/BuildLibCalls.h b/include/llvm/Transforms/Utils/BuildLibCalls.h index 6229cbc..a6e41f0 100644 --- a/include/llvm/Transforms/Utils/BuildLibCalls.h +++ b/include/llvm/Transforms/Utils/BuildLibCalls.h @@ -28,41 +28,52 @@ namespace llvm { /// EmitStrLen - Emit a call to the strlen function to the builder, for the /// specified pointer. Ptr is required to be some pointer type, and the /// return value has 'intptr_t' type. - Value *EmitStrLen(Value *Ptr, IRBuilder<> &B, const TargetData *TD); + Value *EmitStrLen(Value *Ptr, IRBuilder<> &B, const TargetData *TD, + const TargetLibraryInfo *TLI); + + /// EmitStrNLen - Emit a call to the strnlen function to the builder, for the + /// specified pointer. Ptr is required to be some pointer type, MaxLen must + /// be of size_t type, and the return value has 'intptr_t' type. + Value *EmitStrNLen(Value *Ptr, Value *MaxLen, IRBuilder<> &B, + const TargetData *TD, const TargetLibraryInfo *TLI); /// EmitStrChr - Emit a call to the strchr function to the builder, for the /// specified pointer and character. Ptr is required to be some pointer type, /// and the return value has 'i8*' type. - Value *EmitStrChr(Value *Ptr, char C, IRBuilder<> &B, const TargetData *TD); + Value *EmitStrChr(Value *Ptr, char C, IRBuilder<> &B, const TargetData *TD, + const TargetLibraryInfo *TLI); /// EmitStrNCmp - Emit a call to the strncmp function to the builder. Value *EmitStrNCmp(Value *Ptr1, Value *Ptr2, Value *Len, IRBuilder<> &B, - const TargetData *TD); + const TargetData *TD, const TargetLibraryInfo *TLI); /// EmitStrCpy - Emit a call to the strcpy function to the builder, for the /// specified pointer arguments. Value *EmitStrCpy(Value *Dst, Value *Src, IRBuilder<> &B, - const TargetData *TD, StringRef Name = "strcpy"); + const TargetData *TD, const TargetLibraryInfo *TLI, + StringRef Name = "strcpy"); /// EmitStrNCpy - Emit a call to the strncpy function to the builder, for the /// specified pointer arguments and length. Value *EmitStrNCpy(Value *Dst, Value *Src, Value *Len, IRBuilder<> &B, - const TargetData *TD, StringRef Name = "strncpy"); + const TargetData *TD, const TargetLibraryInfo *TLI, + StringRef Name = "strncpy"); /// EmitMemCpyChk - Emit a call to the __memcpy_chk function to the builder. /// This expects that the Len and ObjSize have type 'intptr_t' and Dst/Src /// are pointers. Value *EmitMemCpyChk(Value *Dst, Value *Src, Value *Len, Value *ObjSize, - IRBuilder<> &B, const TargetData *TD); + IRBuilder<> &B, const TargetData *TD, + const TargetLibraryInfo *TLI); /// EmitMemChr - Emit a call to the memchr function. This assumes that Ptr is /// a pointer, Val is an i32 value, and Len is an 'intptr_t' value. Value *EmitMemChr(Value *Ptr, Value *Val, Value *Len, IRBuilder<> &B, - const TargetData *TD); + const TargetData *TD, const TargetLibraryInfo *TLI); /// EmitMemCmp - Emit a call to the memcmp function. Value *EmitMemCmp(Value *Ptr1, Value *Ptr2, Value *Len, IRBuilder<> &B, - const TargetData *TD); + const TargetData *TD, const TargetLibraryInfo *TLI); /// EmitUnaryFloatFnCall - Emit a call to the unary function named 'Name' /// (e.g. 'floor'). This function is known to take a single of type matching @@ -74,26 +85,28 @@ namespace llvm { /// EmitPutChar - Emit a call to the putchar function. This assumes that Char /// is an integer. - Value *EmitPutChar(Value *Char, IRBuilder<> &B, const TargetData *TD); + Value *EmitPutChar(Value *Char, IRBuilder<> &B, const TargetData *TD, + const TargetLibraryInfo *TLI); /// EmitPutS - Emit a call to the puts function. This assumes that Str is /// some pointer. - void EmitPutS(Value *Str, IRBuilder<> &B, const TargetData *TD); + Value *EmitPutS(Value *Str, IRBuilder<> &B, const TargetData *TD, + const TargetLibraryInfo *TLI); /// EmitFPutC - Emit a call to the fputc function. This assumes that Char is /// an i32, and File is a pointer to FILE. - void EmitFPutC(Value *Char, Value *File, IRBuilder<> &B, - const TargetData *TD); + Value *EmitFPutC(Value *Char, Value *File, IRBuilder<> &B, + const TargetData *TD, const TargetLibraryInfo *TLI); /// EmitFPutS - Emit a call to the puts function. Str is required to be a /// pointer and File is a pointer to FILE. - void EmitFPutS(Value *Str, Value *File, IRBuilder<> &B, const TargetData *TD, - const TargetLibraryInfo *TLI); + Value *EmitFPutS(Value *Str, Value *File, IRBuilder<> &B, const TargetData *TD, + const TargetLibraryInfo *TLI); /// EmitFWrite - Emit a call to the fwrite function. This assumes that Ptr is /// a pointer, Size is an 'intptr_t', and File is a pointer to FILE. - void EmitFWrite(Value *Ptr, Value *Size, Value *File, IRBuilder<> &B, - const TargetData *TD, const TargetLibraryInfo *TLI); + Value *EmitFWrite(Value *Ptr, Value *Size, Value *File, IRBuilder<> &B, + const TargetData *TD, const TargetLibraryInfo *TLI); /// SimplifyFortifiedLibCalls - Helper class for folding checked library /// calls (e.g. __strcpy_chk) into their unchecked counterparts. @@ -105,7 +118,7 @@ namespace llvm { bool isString) const = 0; public: virtual ~SimplifyFortifiedLibCalls(); - bool fold(CallInst *CI, const TargetData *TD); + bool fold(CallInst *CI, const TargetData *TD, const TargetLibraryInfo *TLI); }; } diff --git a/include/llvm/TypeFinder.h b/include/llvm/TypeFinder.h new file mode 100644 index 0000000..5d80705 --- /dev/null +++ b/include/llvm/TypeFinder.h @@ -0,0 +1,78 @@ +//===-- llvm/TypeFinder.h - Class for finding used struct types -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the declaration of the TypeFinder class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_TYPEFINDER_H +#define LLVM_TYPEFINDER_H + +#include "llvm/ADT/DenseSet.h" +#include <vector> + +namespace llvm { + +class MDNode; +class Module; +class StructType; +class Type; +class Value; + +/// TypeFinder - Walk over a module, identifying all of the types that are +/// used by the module. +class TypeFinder { + // To avoid walking constant expressions multiple times and other IR + // objects, we keep several helper maps. + DenseSet<const Value*> VisitedConstants; + DenseSet<Type*> VisitedTypes; + + std::vector<StructType*> StructTypes; + bool OnlyNamed; + +public: + TypeFinder() : OnlyNamed(false) {} + + void run(const Module &M, bool onlyNamed); + void clear(); + + typedef std::vector<StructType*>::iterator iterator; + typedef std::vector<StructType*>::const_iterator const_iterator; + + iterator begin() { return StructTypes.begin(); } + iterator end() { return StructTypes.end(); } + + const_iterator begin() const { return StructTypes.begin(); } + const_iterator end() const { return StructTypes.end(); } + + bool empty() const { return StructTypes.empty(); } + size_t size() const { return StructTypes.size(); } + iterator erase(iterator I, iterator E) { return StructTypes.erase(I, E); } + + StructType *&operator[](unsigned Idx) { return StructTypes[Idx]; } + +private: + /// incorporateType - This method adds the type to the list of used + /// structures if it's not in there already. + void incorporateType(Type *Ty); + + /// incorporateValue - This method is used to walk operand lists finding types + /// hiding in constant expressions and other operands that won't be walked in + /// other ways. GlobalValues, basic blocks, instructions, and inst operands + /// are all explicitly enumerated. + void incorporateValue(const Value *V); + + /// incorporateMDNode - This method is used to walk the operands of an MDNode + /// to find types hiding within. + void incorporateMDNode(const MDNode *V); +}; + +} // end llvm namespace + +#endif |