aboutsummaryrefslogtreecommitdiffstats
path: root/include/llvm
diff options
context:
space:
mode:
authorEvan Cheng <evan.cheng@apple.com>2010-05-05 18:45:40 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-05-05 18:45:40 +0000
commit3d720fbc6ad40bc9287a420f824d244965d24631 (patch)
treeaa97968a80ac2e0765c1b311e378b7c5bb785063 /include/llvm
parentea03e10facd07f0b239dcc3a5e31346686acae3c (diff)
downloadexternal_llvm-3d720fbc6ad40bc9287a420f824d244965d24631.zip
external_llvm-3d720fbc6ad40bc9287a420f824d244965d24631.tar.gz
external_llvm-3d720fbc6ad40bc9287a420f824d244965d24631.tar.bz2
Move REG_SEQUENCE removal to 2addr pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103109 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm')
-rw-r--r--include/llvm/CodeGen/MachineInstr.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index c4adca1..2d203a0 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -223,6 +223,9 @@ public:
bool isSubregToReg() const {
return getOpcode() == TargetOpcode::SUBREG_TO_REG;
}
+ bool isRegSequence() const {
+ return getOpcode() == TargetOpcode::REG_SEQUENCE;
+ }
/// readsRegister - Return true if the MachineInstr reads the specified
/// register. If TargetRegisterInfo is passed, then it also checks if there