diff options
author | Dan Gohman <gohman@apple.com> | 2007-06-25 16:23:39 +0000 |
---|---|---|
committer | Dan Gohman <gohman@apple.com> | 2007-06-25 16:23:39 +0000 |
commit | 7f32156bb9c017b71971c52fac892fa7b9b06dd2 (patch) | |
tree | 23e97cecd52949f8ec279c6abc8935b60a63f199 /include/llvm | |
parent | 32791e06d8bdfaca5350e089056db2ac66bf3adf (diff) | |
download | external_llvm-7f32156bb9c017b71971c52fac892fa7b9b06dd2.zip external_llvm-7f32156bb9c017b71971c52fac892fa7b9b06dd2.tar.gz external_llvm-7f32156bb9c017b71971c52fac892fa7b9b06dd2.tar.bz2 |
Generalize MVT::ValueType and associated functions to be able to represent
extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.
This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm')
-rw-r--r-- | include/llvm/CodeGen/CallingConvLower.h | 4 | ||||
-rw-r--r-- | include/llvm/CodeGen/SelectionDAG.h | 2 | ||||
-rw-r--r-- | include/llvm/CodeGen/SelectionDAGNodes.h | 85 | ||||
-rw-r--r-- | include/llvm/CodeGen/ValueTypes.h | 187 | ||||
-rw-r--r-- | include/llvm/Target/TargetLowering.h | 54 |
5 files changed, 179 insertions, 153 deletions
diff --git a/include/llvm/CodeGen/CallingConvLower.h b/include/llvm/CodeGen/CallingConvLower.h index 4308c37..959d052 100644 --- a/include/llvm/CodeGen/CallingConvLower.h +++ b/include/llvm/CodeGen/CallingConvLower.h @@ -48,10 +48,10 @@ private: LocInfo HTP : 7; /// ValVT - The type of the value being assigned. - MVT::ValueType ValVT : 8; + MVT::ValueType ValVT; /// LocVT - The type of the location being assigned to. - MVT::ValueType LocVT : 8; + MVT::ValueType LocVT; public: static CCValAssign getReg(unsigned ValNo, MVT::ValueType ValVT, diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h index 56cb17d..9388df1 100644 --- a/include/llvm/CodeGen/SelectionDAG.h +++ b/include/llvm/CodeGen/SelectionDAG.h @@ -319,8 +319,6 @@ public: unsigned Alignment=0); SDOperand getIndexedLoad(SDOperand OrigLoad, SDOperand Base, SDOperand Offset, ISD::MemIndexedMode AM); - SDOperand getVecLoad(unsigned Count, MVT::ValueType VT, SDOperand Chain, - SDOperand Ptr, SDOperand SV); /// getStore - Helper function to build ISD::STORE nodes. /// diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index 5a7d47f..792859a 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -237,58 +237,30 @@ namespace ISD { // FCOPYSIGN(f32, f64) is allowed. FCOPYSIGN, - /// VBUILD_VECTOR(ELT1, ELT2, ELT3, ELT4,..., COUNT,TYPE) - Return a vector - /// with the specified, possibly variable, elements. The number of elements - /// is required to be a power of two. - VBUILD_VECTOR, - /// BUILD_VECTOR(ELT1, ELT2, ELT3, ELT4,...) - Return a vector /// with the specified, possibly variable, elements. The number of elements /// is required to be a power of two. BUILD_VECTOR, - /// VINSERT_VECTOR_ELT(VECTOR, VAL, IDX, COUNT,TYPE) - Given a vector - /// VECTOR, an element ELEMENT, and a (potentially variable) index IDX, - /// return a vector with the specified element of VECTOR replaced with VAL. - /// COUNT and TYPE specify the type of vector, as is standard for V* nodes. - VINSERT_VECTOR_ELT, - - /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR (a legal packed - /// type) with the element at IDX replaced with VAL. + /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element + /// at IDX replaced with VAL. INSERT_VECTOR_ELT, - /// VEXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR - /// (an MVT::Vector value) identified by the (potentially variable) element - /// number IDX. - VEXTRACT_VECTOR_ELT, - /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR - /// (a legal vector type vector) identified by the (potentially variable) - /// element number IDX. + /// identified by the (potentially variable) element number IDX. EXTRACT_VECTOR_ELT, - /// VCONCAT_VECTORS(VECTOR0, VECTOR1, ..., COUNT,TYPE) - Given a number of - /// values of MVT::Vector type with the same length and element type, this - /// produces a concatenated MVT::Vector result value, with length equal to - /// the sum of the input vectors. This can only be used before - /// legalization. - VCONCAT_VECTORS, + /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of + /// vector type with the same length and element type, this produces a + /// concatenated vector result value, with length equal to the sum of the + /// input vectors. + CONCAT_VECTORS, - /// VEXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an - /// MVT::Vector value) starting with the (potentially variable) - /// element number IDX, which must be a multiple of the result vector - /// length. This can only be used before legalization. - VEXTRACT_SUBVECTOR, + /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an + /// vector value) starting with the (potentially variable) element number + /// IDX, which must be a multiple of the result vector length. + EXTRACT_SUBVECTOR, - /// VVECTOR_SHUFFLE(VEC1, VEC2, SHUFFLEVEC, COUNT,TYPE) - Returns a vector, - /// of the same type as VEC1/VEC2. SHUFFLEVEC is a VBUILD_VECTOR of - /// constant int values that indicate which value each result element will - /// get. The elements of VEC1/VEC2 are enumerated in order. This is quite - /// similar to the Altivec 'vperm' instruction, except that the indices must - /// be constants and are in terms of the element size of VEC1/VEC2, not in - /// terms of bytes. - VVECTOR_SHUFFLE, - /// VECTOR_SHUFFLE(VEC1, VEC2, SHUFFLEVEC) - Returns a vector, of the same /// type as VEC1/VEC2. SHUFFLEVEC is a BUILD_VECTOR of constant int values /// (regardless of whether its datatype is legal or not) that indicate @@ -298,34 +270,6 @@ namespace ISD { /// of the element size of VEC1/VEC2, not in terms of bytes. VECTOR_SHUFFLE, - /// X = VBIT_CONVERT(Y) and X = VBIT_CONVERT(Y, COUNT,TYPE) - This node - /// represents a conversion from or to an ISD::Vector type. - /// - /// This is lowered to a BIT_CONVERT of the appropriate input/output types. - /// The input and output are required to have the same size and at least one - /// is required to be a vector (if neither is a vector, just use - /// BIT_CONVERT). - /// - /// If the result is a vector, this takes three operands (like any other - /// vector producer) which indicate the size and type of the vector result. - /// Otherwise it takes one input. - VBIT_CONVERT, - - /// BINOP(LHS, RHS, COUNT,TYPE) - /// Simple abstract vector operators. Unlike the integer and floating point - /// binary operators, these nodes also take two additional operands: - /// a constant element count, and a value type node indicating the type of - /// the elements. The order is op0, op1, count, type. All vector opcodes, - /// including VLOAD and VConstant must currently have count and type as - /// their last two operands. - VADD, VSUB, VMUL, VSDIV, VUDIV, - VAND, VOR, VXOR, - - /// VSELECT(COND,LHS,RHS, COUNT,TYPE) - Select for MVT::Vector values. - /// COND is a boolean value. This node return LHS if COND is true, RHS if - /// COND is false. - VSELECT, - /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a /// scalar value into the low element of the resultant vector type. The top /// elements of the vector are undefined. @@ -432,11 +376,6 @@ namespace ISD { // indexed memory ops). LOAD, STORE, - // Abstract vector version of LOAD. VLOAD has a constant element count as - // the first operand, followed by a value type node indicating the type of - // the elements, a token chain, a pointer operand, and a SRCVALUE node. - VLOAD, - // TRUNCSTORE - This operators truncates (for integer) or rounds (for FP) a // value and stores it to memory in one operation. This can be used for // either integer or floating point operands. The first four operands of diff --git a/include/llvm/CodeGen/ValueTypes.h b/include/llvm/CodeGen/ValueTypes.h index a42cee1..c998386 100644 --- a/include/llvm/CodeGen/ValueTypes.h +++ b/include/llvm/CodeGen/ValueTypes.h @@ -17,16 +17,17 @@ #define LLVM_CODEGEN_VALUETYPES_H #include <cassert> +#include <string> #include "llvm/Support/DataTypes.h" namespace llvm { class Type; -/// MVT namespace - This namespace defines the ValueType enum, which contains -/// the various low-level value types. +/// MVT namespace - This namespace defines the SimpleValueType enum, which +/// contains the various low-level value types, and the ValueType typedef. /// namespace MVT { // MVT = Machine Value Types - enum ValueType { + enum SimpleValueType { // If you change this numbering, you must change the values in ValueTypes.td // well! Other = 0, // This is a non-standard value @@ -45,10 +46,6 @@ namespace MVT { // MVT = Machine Value Types isVoid = 12, // This has no value - Vector = 13, // This is an abstract vector type, which will - // be expanded into a target vector type, or scalars - // if no matching vector type is available. - v8i8 = 14, // 8 x i8 v4i16 = 15, // 4 x i16 v2i32 = 16, // 2 x i32 @@ -76,64 +73,55 @@ namespace MVT { // MVT = Machine Value Types iPTR = 255 }; - /// MVT::isInteger - Return true if this is a simple integer, or a packed - /// vector integer type. - static inline bool isInteger(ValueType VT) { - return (VT >= i1 && VT <= i128) || (VT >= v8i8 && VT <= v2i64); + /// MVT::ValueType - This type holds low-level value types. Valid values + /// include any of the values in the SimpleValueType enum, or any value + /// returned from a function in the MVT namespace that has a ValueType + /// return type. Any value type equal to one of the SimpleValueType enum + /// values is a "simple" value type. All other value types are "extended". + /// + /// Note that simple doesn't necessary mean legal for the target machine. + /// All legal value types must be simple, but often there are some simple + /// value types that are not legal. + typedef uint32_t ValueType; + + static const int SimpleTypeBits = 8; + + static const uint32_t SimpleTypeMask = + (~uint32_t(0) << (32 - SimpleTypeBits)) >> (32 - SimpleTypeBits); + + /// MVT::isExtendedValueType - Test if the given ValueType is extended + /// (as opposed to being simple). + static inline bool isExtendedValueType(ValueType VT) { + return VT & ~SimpleTypeMask; } - /// MVT::isFloatingPoint - Return true if this is a simple FP, or a packed - /// vector FP type. - static inline bool isFloatingPoint(ValueType VT) { - return (VT >= f32 && VT <= f128) || (VT >= v2f32 && VT <= v2f64); + /// MVT::isInteger - Return true if this is an integer, or a vector integer + /// type. + static inline bool isInteger(ValueType VT) { + ValueType SVT = VT & SimpleTypeMask; + return (SVT >= i1 && SVT <= i128) || (SVT >= v8i8 && SVT <= v2i64); } - /// MVT::isVector - Return true if this is a packed vector type (i.e. not - /// MVT::Vector). - static inline bool isVector(ValueType VT) { - return VT >= FIRST_VECTOR_VALUETYPE && VT <= LAST_VECTOR_VALUETYPE; + /// MVT::isFloatingPoint - Return true if this is an FP, or a vector FP type. + static inline bool isFloatingPoint(ValueType VT) { + ValueType SVT = VT & SimpleTypeMask; + return (SVT >= f32 && SVT <= f128) || (SVT >= v2f32 && SVT <= v2f64); } - /// MVT::getSizeInBits - Return the size of the specified value type in bits. - /// - static inline unsigned getSizeInBits(ValueType VT) { - switch (VT) { - default: assert(0 && "ValueType has no known size!"); - case MVT::i1 : return 1; - case MVT::i8 : return 8; - case MVT::i16 : return 16; - case MVT::f32 : - case MVT::i32 : return 32; - case MVT::f64 : - case MVT::i64 : - case MVT::v8i8: - case MVT::v4i16: - case MVT::v2i32: - case MVT::v1i64: - case MVT::v2f32: return 64; - case MVT::f80 : return 80; - case MVT::f128: - case MVT::i128: - case MVT::v16i8: - case MVT::v8i16: - case MVT::v4i32: - case MVT::v2i64: - case MVT::v4f32: - case MVT::v2f64: return 128; - } + /// MVT::isVector - Return true if this is a vector value type. + static inline bool isVector(ValueType VT) { + return (VT >= FIRST_VECTOR_VALUETYPE && VT <= LAST_VECTOR_VALUETYPE) || + isExtendedValueType(VT); } - /// MVT::getVectorType - Returns the ValueType that represents a vector - /// NumElements in length, where each element is of type VT. If there is no - /// ValueType that represents this vector, a ValueType of Other is returned. - /// - ValueType getVectorType(ValueType VT, unsigned NumElements); - - /// MVT::getVectorElementType - Given a packed vector type, return the type of + /// MVT::getVectorElementType - Given a vector type, return the type of /// each element. static inline ValueType getVectorElementType(ValueType VT) { switch (VT) { - default: assert(0 && "Invalid vector type!"); + default: + if (isExtendedValueType(VT)) + return VT & SimpleTypeMask; + assert(0 && "Invalid vector type!"); case v8i8 : case v16i8: return i8; case v4i16: @@ -148,11 +136,14 @@ namespace MVT { // MVT = Machine Value Types } } - /// MVT::getVectorNumElements - Given a packed vector type, return the number - /// of elements it contains. + /// MVT::getVectorNumElements - Given a vector type, return the + /// number of elements it contains. static inline unsigned getVectorNumElements(ValueType VT) { switch (VT) { - default: assert(0 && "Invalid vector type!"); + default: + if (isExtendedValueType(VT)) + return ((VT & ~SimpleTypeMask) >> SimpleTypeBits) - 1; + assert(0 && "Invalid vector type!"); case v16i8: return 16; case v8i8 : case v8i16: return 8; @@ -167,11 +158,84 @@ namespace MVT { // MVT = Machine Value Types } } + /// MVT::getSizeInBits - Return the size of the specified value type + /// in bits. + /// + static inline unsigned getSizeInBits(ValueType VT) { + switch (VT) { + default: + if (isExtendedValueType(VT)) + return getSizeInBits(getVectorElementType(VT)) * + getVectorNumElements(VT); + assert(0 && "ValueType has no known size!"); + case MVT::i1 : return 1; + case MVT::i8 : return 8; + case MVT::i16 : return 16; + case MVT::f32 : + case MVT::i32 : return 32; + case MVT::f64 : + case MVT::i64 : + case MVT::v8i8: + case MVT::v4i16: + case MVT::v2i32: + case MVT::v1i64: + case MVT::v2f32: return 64; + case MVT::f80 : return 80; + case MVT::f128: + case MVT::i128: + case MVT::v16i8: + case MVT::v8i16: + case MVT::v4i32: + case MVT::v2i64: + case MVT::v4f32: + case MVT::v2f64: return 128; + } + } + + /// MVT::getVectorType - Returns the ValueType that represents a vector + /// NumElements in length, where each element is of type VT. + /// + static inline ValueType getVectorType(ValueType VT, unsigned NumElements) { + switch (VT) { + default: + break; + case MVT::i8: + if (NumElements == 8) return MVT::v8i8; + if (NumElements == 16) return MVT::v16i8; + break; + case MVT::i16: + if (NumElements == 4) return MVT::v4i16; + if (NumElements == 8) return MVT::v8i16; + break; + case MVT::i32: + if (NumElements == 2) return MVT::v2i32; + if (NumElements == 4) return MVT::v4i32; + break; + case MVT::i64: + if (NumElements == 1) return MVT::v1i64; + if (NumElements == 2) return MVT::v2i64; + break; + case MVT::f32: + if (NumElements == 2) return MVT::v2f32; + if (NumElements == 4) return MVT::v4f32; + break; + case MVT::f64: + if (NumElements == 2) return MVT::v2f64; + break; + } + ValueType Result = VT | ((NumElements + 1) << SimpleTypeBits); + assert(getVectorElementType(Result) == VT && + "Bad vector element type!"); + assert(getVectorNumElements(Result) == NumElements && + "Bad vector length!"); + return Result; + } + /// MVT::getIntVectorWithNumElements - Return any integer vector type that has /// the specified number of elements. static inline ValueType getIntVectorWithNumElements(unsigned NumElts) { switch (NumElts) { - default: assert(0 && "Invalid vector type!"); + default: return getVectorType(i8, NumElts); case 1: return v1i64; case 2: return v2i32; case 4: return v4i16; @@ -196,7 +260,7 @@ namespace MVT { // MVT = Machine Value Types /// MVT::getValueTypeString - This function returns value type as a string, /// e.g. "i32". - const char *getValueTypeString(ValueType VT); + std::string getValueTypeString(ValueType VT); /// MVT::getTypeForValueType - This method returns an LLVM type corresponding /// to the specified ValueType. For integer types, this returns an unsigned @@ -204,9 +268,8 @@ namespace MVT { // MVT = Machine Value Types const Type *getTypeForValueType(ValueType VT); /// MVT::getValueType - Return the value type corresponding to the specified - /// type. This returns all vectors as MVT::Vector and all pointers as - /// MVT::iPTR. If HandleUnknown is true, unknown types are returned as Other, - /// otherwise they are invalid. + /// type. This returns all pointers as MVT::iPTR. If HandleUnknown is true, + /// unknown types are returned as Other, otherwise they are invalid. ValueType getValueType(const Type *Ty, bool HandleUnknown = false); } diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 5b98667..88682f4 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -120,6 +120,7 @@ public: /// getRegClassFor - Return the register class that should be used for the /// specified value type. This may only be called on legal types. TargetRegisterClass *getRegClassFor(MVT::ValueType VT) const { + assert(!MVT::isExtendedValueType(VT)); TargetRegisterClass *RC = RegClassForVT[VT]; assert(RC && "This value type is not natively supported!"); return RC; @@ -129,7 +130,9 @@ public: /// specified value type. This means that it has a register that directly /// holds it without promotions or expansions. bool isTypeLegal(MVT::ValueType VT) const { - return RegClassForVT[VT] != 0; + return !MVT::isExtendedValueType(VT) ? + RegClassForVT[VT] != 0 : + false; } class ValueTypeActionImpl { @@ -147,9 +150,12 @@ public: } LegalizeAction getTypeAction(MVT::ValueType VT) const { - return (LegalizeAction)((ValueTypeActions[VT>>4] >> ((2*VT) & 31)) & 3); + return !MVT::isExtendedValueType(VT) ? + (LegalizeAction)((ValueTypeActions[VT>>4] >> ((2*VT) & 31)) & 3) : + Expand; } void setTypeAction(MVT::ValueType VT, LegalizeAction Action) { + assert(!MVT::isExtendedValueType(VT)); assert(unsigned(VT >> 4) < sizeof(ValueTypeActions)/sizeof(ValueTypeActions[0])); ValueTypeActions[VT>>4] |= Action << ((VT*2) & 31); @@ -175,6 +181,10 @@ public: /// to get to the smaller register. For illegal floating point types, this /// returns the integer type to transform to. MVT::ValueType getTypeToTransformTo(MVT::ValueType VT) const { + if (MVT::isExtendedValueType(VT)) + return MVT::getVectorType(MVT::getVectorElementType(VT), + MVT::getVectorNumElements(VT) / 2); + return TransformToType[VT]; } @@ -183,12 +193,13 @@ public: /// that are larger than the largest integer register or illegal floating /// point types), this returns the largest legal type it will be expanded to. MVT::ValueType getTypeToExpandTo(MVT::ValueType VT) const { + assert(!MVT::isExtendedValueType(VT)); while (true) { switch (getTypeAction(VT)) { case Legal: return VT; case Expand: - VT = TransformToType[VT]; + VT = getTypeToTransformTo(VT); break; default: assert(false && "Type is not legal nor is it to be expanded!"); @@ -199,17 +210,17 @@ public: } /// getVectorTypeBreakdown - Vector types are broken down into some number of - /// legal first class types. For example, <8 x float> maps to 2 MVT::v4f32 + /// legal first class types. For example, MVT::v8f32 maps to 2 MVT::v4f32 /// with Altivec or SSE1, or 8 promoted MVT::f64 values with the X86 FP stack. - /// Similarly, <2 x long> turns into 4 MVT::i32 values with both PPC and X86. + /// Similarly, MVT::v2i64 turns into 4 MVT::i32 values with both PPC and X86. /// /// This method returns the number of registers needed, and the VT for each /// register. It also returns the VT of the VectorType elements before they /// are promoted/expanded. /// - unsigned getVectorTypeBreakdown(const VectorType *PTy, - MVT::ValueType &PTyElementVT, - MVT::ValueType &PTyLegalElementVT) const; + unsigned getVectorTypeBreakdown(MVT::ValueType VT, + MVT::ValueType &ElementVT, + MVT::ValueType &LegalElementVT) const; typedef std::vector<double>::const_iterator legal_fpimm_iterator; legal_fpimm_iterator legal_fpimm_begin() const { @@ -242,7 +253,9 @@ public: /// expanded to some other code sequence, or the target has a custom expander /// for it. LegalizeAction getOperationAction(unsigned Op, MVT::ValueType VT) const { - return (LegalizeAction)((OpActions[Op] >> (2*VT)) & 3); + return !MVT::isExtendedValueType(VT) ? + (LegalizeAction)((OpActions[Op] >> (2*VT)) & 3) : + Expand; } /// isOperationLegal - Return true if the specified operation is legal on this @@ -257,7 +270,9 @@ public: /// expanded to some other code sequence, or the target has a custom expander /// for it. LegalizeAction getLoadXAction(unsigned LType, MVT::ValueType VT) const { - return (LegalizeAction)((LoadXActions[LType] >> (2*VT)) & 3); + return !MVT::isExtendedValueType(VT) ? + (LegalizeAction)((LoadXActions[LType] >> (2*VT)) & 3) : + Expand; } /// isLoadXLegal - Return true if the specified load with extension is legal @@ -272,7 +287,9 @@ public: /// expanded to some other code sequence, or the target has a custom expander /// for it. LegalizeAction getStoreXAction(MVT::ValueType VT) const { - return (LegalizeAction)((StoreXActions >> (2*VT)) & 3); + return !MVT::isExtendedValueType(VT) ? + (LegalizeAction)((StoreXActions >> (2*VT)) & 3) : + Expand; } /// isStoreXLegal - Return true if the specified store with truncation is @@ -287,7 +304,9 @@ public: /// for it. LegalizeAction getIndexedLoadAction(unsigned IdxMode, MVT::ValueType VT) const { - return (LegalizeAction)((IndexedModeActions[0][IdxMode] >> (2*VT)) & 3); + return !MVT::isExtendedValueType(VT) ? + (LegalizeAction)((IndexedModeActions[0][IdxMode] >> (2*VT)) & 3) : + Expand; } /// isIndexedLoadLegal - Return true if the specified indexed load is legal @@ -303,7 +322,9 @@ public: /// for it. LegalizeAction getIndexedStoreAction(unsigned IdxMode, MVT::ValueType VT) const { - return (LegalizeAction)((IndexedModeActions[1][IdxMode] >> (2*VT)) & 3); + return !MVT::isExtendedValueType(VT) ? + (LegalizeAction)((IndexedModeActions[1][IdxMode] >> (2*VT)) & 3) : + Expand; } /// isIndexedStoreLegal - Return true if the specified indexed load is legal @@ -352,7 +373,11 @@ public: /// registers, but may be more than one for types (like i64) that are split /// into pieces. unsigned getNumRegisters(MVT::ValueType VT) const { - return NumRegistersForVT[VT]; + if (!MVT::isExtendedValueType(VT)) + return NumRegistersForVT[VT]; + + MVT::ValueType VT1, VT2; + return getVectorTypeBreakdown(VT, VT1, VT2); } /// hasTargetDAGCombine - If true, the target has custom DAG combine @@ -648,6 +673,7 @@ protected: /// regclass for the specified value type. This indicates the selector can /// handle values of that class natively. void addRegisterClass(MVT::ValueType VT, TargetRegisterClass *RC) { + assert(!MVT::isExtendedValueType(VT)); AvailableRegClasses.push_back(std::make_pair(VT, RC)); RegClassForVT[VT] = RC; } |