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author | Dan Gohman <gohman@apple.com> | 2010-07-10 09:00:22 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2010-07-10 09:00:22 +0000 |
commit | 84023e0fbefc406a4c611d3d64a10df5d3a97dd7 (patch) | |
tree | 8f47ad9a2c30661cf7b3e3f5bbe5fe195a8a44f8 /include/llvm | |
parent | d737fcafc4cedcbe798930d96203a9e22c1e6e68 (diff) | |
download | external_llvm-84023e0fbefc406a4c611d3d64a10df5d3a97dd7.zip external_llvm-84023e0fbefc406a4c611d3d64a10df5d3a97dd7.tar.gz external_llvm-84023e0fbefc406a4c611d3d64a10df5d3a97dd7.tar.bz2 |
Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
- Eschew ST0 and ST1 for return values.
- Fix the PIC base register initialization so that it doesn't ever
fail to end up the top of the entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm')
-rw-r--r-- | include/llvm/CodeGen/CallingConvLower.h | 3 | ||||
-rw-r--r-- | include/llvm/CodeGen/FastISel.h | 35 | ||||
-rw-r--r-- | include/llvm/CodeGen/FunctionLoweringInfo.h | 10 | ||||
-rw-r--r-- | include/llvm/CodeGen/SelectionDAGISel.h | 13 | ||||
-rw-r--r-- | include/llvm/Target/TargetLowering.h | 13 |
5 files changed, 50 insertions, 24 deletions
diff --git a/include/llvm/CodeGen/CallingConvLower.h b/include/llvm/CodeGen/CallingConvLower.h index 5ce59b8..7911907 100644 --- a/include/llvm/CodeGen/CallingConvLower.h +++ b/include/llvm/CodeGen/CallingConvLower.h @@ -188,8 +188,7 @@ public: /// CheckReturn - Analyze the return values of a function, returning /// true if the return can be performed without sret-demotion, and /// false otherwise. - bool CheckReturn(const SmallVectorImpl<EVT> &OutTys, - const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags, + bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags, CCAssignFn Fn); /// AnalyzeCallOperands - Analyze the outgoing arguments to a call, diff --git a/include/llvm/CodeGen/FastISel.h b/include/llvm/CodeGen/FastISel.h index c5c457d..7f3a7c7 100644 --- a/include/llvm/CodeGen/FastISel.h +++ b/include/llvm/CodeGen/FastISel.h @@ -19,6 +19,7 @@ #include "llvm/ADT/SmallSet.h" #endif #include "llvm/CodeGen/ValueTypes.h" +#include "llvm/CodeGen/MachineBasicBlock.h" namespace llvm { @@ -44,7 +45,6 @@ class TargetRegisterInfo; /// lowering, but runs quickly. class FastISel { protected: - MachineBasicBlock *MBB; DenseMap<const Value *, unsigned> LocalValueMap; FunctionLoweringInfo &FuncInfo; MachineRegisterInfo &MRI; @@ -56,23 +56,21 @@ protected: const TargetInstrInfo &TII; const TargetLowering &TLI; const TargetRegisterInfo &TRI; - bool IsBottomUp; + MachineInstr *LastLocalValue; public: + /// getLastLocalValue - Return the position of the last instruction + /// emitted for materializing constants for use in the current block. + MachineInstr *getLastLocalValue() { return LastLocalValue; } + + /// setLastLocalValue - Update the position of the last instruction + /// emitted for materializing constants for use in the current block. + void setLastLocalValue(MachineInstr *I) { LastLocalValue = I; } + /// startNewBlock - Set the current block to which generated machine /// instructions will be appended, and clear the local CSE map. /// - void startNewBlock(MachineBasicBlock *mbb) { - setCurrentBlock(mbb); - LocalValueMap.clear(); - } - - /// setCurrentBlock - Set the current block to which generated machine - /// instructions will be appended. - /// - void setCurrentBlock(MachineBasicBlock *mbb) { - MBB = mbb; - } + void startNewBlock(); /// getCurDebugLoc() - Return current debug location information. DebugLoc getCurDebugLoc() const { return DL; } @@ -104,6 +102,17 @@ public: /// index value. std::pair<unsigned, bool> getRegForGEPIndex(const Value *V); + /// recomputeInsertPt - Reset InsertPt to prepare for insterting instructions + /// into the current block. + void recomputeInsertPt(); + + /// enterLocalValueArea - Prepare InsertPt to begin inserting instructions + /// into the local value area and return the old insert position. + MachineBasicBlock::iterator enterLocalValueArea(); + + /// leaveLocalValueArea - Reset InsertPt to the given old insert position + void leaveLocalValueArea(MachineBasicBlock::iterator OldInsertPt); + virtual ~FastISel(); protected: diff --git a/include/llvm/CodeGen/FunctionLoweringInfo.h b/include/llvm/CodeGen/FunctionLoweringInfo.h index 011d4261..c49d1ed 100644 --- a/include/llvm/CodeGen/FunctionLoweringInfo.h +++ b/include/llvm/CodeGen/FunctionLoweringInfo.h @@ -25,6 +25,7 @@ #endif #include "llvm/CodeGen/ValueTypes.h" #include "llvm/CodeGen/ISDOpcodes.h" +#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/Support/CallSite.h" #include <vector> @@ -80,6 +81,15 @@ public: /// function arguments that are inserted after scheduling is completed. SmallVector<MachineInstr*, 8> ArgDbgValues; + /// RegFixups - Registers which need to be replaced after isel is done. + DenseMap<unsigned, unsigned> RegFixups; + + /// MBB - The current block. + MachineBasicBlock *MBB; + + /// MBB - The current insert position inside the current block. + MachineBasicBlock::iterator InsertPt; + #ifndef NDEBUG SmallSet<const Instruction *, 8> CatchInfoLost; SmallSet<const Instruction *, 8> CatchInfoFound; diff --git a/include/llvm/CodeGen/SelectionDAGISel.h b/include/llvm/CodeGen/SelectionDAGISel.h index 1615994..01d05dd 100644 --- a/include/llvm/CodeGen/SelectionDAGISel.h +++ b/include/llvm/CodeGen/SelectionDAGISel.h @@ -280,15 +280,14 @@ private: SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTs, const SDValue *Ops, unsigned NumOps, unsigned EmitNodeInfo); - void PrepareEHLandingPad(MachineBasicBlock *BB); + void PrepareEHLandingPad(); void SelectAllBasicBlocks(const Function &Fn); - void FinishBasicBlock(MachineBasicBlock *BB); + void FinishBasicBlock(); - MachineBasicBlock *SelectBasicBlock(MachineBasicBlock *BB, - BasicBlock::const_iterator Begin, - BasicBlock::const_iterator End, - bool &HadTailCall); - MachineBasicBlock *CodeGenAndEmitDAG(MachineBasicBlock *BB); + void SelectBasicBlock(BasicBlock::const_iterator Begin, + BasicBlock::const_iterator End, + bool &HadTailCall); + void CodeGenAndEmitDAG(); void LowerArguments(const BasicBlock *BB); void ComputeLiveOutVRegInfo(); diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 2d87d4d..47aa6d1 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -24,6 +24,7 @@ #include "llvm/CallingConv.h" #include "llvm/InlineAsm.h" +#include "llvm/Attributes.h" #include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/CodeGen/RuntimeLibcalls.h" #include "llvm/ADT/APFloat.h" @@ -1159,8 +1160,7 @@ public: /// registers. If false is returned, an sret-demotion is performed. /// virtual bool CanLowerReturn(CallingConv::ID CallConv, bool isVarArg, - const SmallVectorImpl<EVT> &OutTys, - const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags, + const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const { // Return true by default to get preexisting behavior. @@ -1656,6 +1656,15 @@ protected: /// optimization. bool benefitFromCodePlacementOpt; }; + +/// GetReturnInfo - Given an LLVM IR type and return type attributes, +/// compute the return value EVTs and flags, and optionally also +/// the offsets, if the return value is being lowered to memory. +void GetReturnInfo(const Type* ReturnType, Attributes attr, + SmallVectorImpl<ISD::OutputArg> &Outs, + const TargetLowering &TLI, + SmallVectorImpl<uint64_t> *Offsets = 0); + } // end llvm namespace #endif |