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author | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-09-30 15:28:56 +0000 |
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committer | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-09-30 15:28:56 +0000 |
commit | d42730dc712026cbfb1322a979e0ac72cd31a19e (patch) | |
tree | 191050f59933595fe9aeb6b77193c74686c694e3 /include/llvm | |
parent | a5b9cd1c68eda914ffcf133228824ca58e1ba518 (diff) | |
download | external_llvm-d42730dc712026cbfb1322a979e0ac72cd31a19e.zip external_llvm-d42730dc712026cbfb1322a979e0ac72cd31a19e.tar.gz external_llvm-d42730dc712026cbfb1322a979e0ac72cd31a19e.tar.bz2 |
IfConverter: Use TargetSchedule for instruction latencies
For targets that have instruction itineraries this means no change. Targets
that move over to the new schedule model will use be able the new schedule
module for instruction latencies in the if-converter (the logic is such that if
there is no itineary we will use the new sched model for the latencies).
Before, we queried "TTI->getInstructionLatency()" for the instruction latency
and the extra prediction cost. Now, we query the TargetSchedule abstraction for
the instruction latency and TargetInstrInfo for the extra predictation cost. The
TargetSchedule abstraction will internally call "TTI->getInstructionLatency" if
an itinerary exists, otherwise it will use the new schedule model.
ATTENTION: Out of tree targets!
(I will also send out an email later to LLVMDev)
This means, if your target implements
unsigned getInstrLatency(const InstrItineraryData *ItinData,
const MachineInstr *MI,
unsigned *PredCost);
and returns a value for "PredCost", you now also need to implement
unsigned getPredictationCost(const MachineInstr *MI);
(if your target uses the IfConversion.cpp pass)
radar://15077010
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191671 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm')
-rw-r--r-- | include/llvm/CodeGen/TargetSchedule.h | 8 | ||||
-rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 2 |
2 files changed, 9 insertions, 1 deletions
diff --git a/include/llvm/CodeGen/TargetSchedule.h b/include/llvm/CodeGen/TargetSchedule.h index f2adcf8..8ef26b7 100644 --- a/include/llvm/CodeGen/TargetSchedule.h +++ b/include/llvm/CodeGen/TargetSchedule.h @@ -152,7 +152,13 @@ public: /// Compute and return the expected latency of this instruction independent of /// a particular use. computeOperandLatency is the prefered API, but this is /// occasionally useful to help estimate instruction cost. - unsigned computeInstrLatency(const MachineInstr *MI) const; + /// + /// If UseDefaultDefLatency is false and no new machine sched model is + /// present this method falls back to TII->getInstrLatency with an empty + /// instruction itinerary (this is so we preserve the previous behavior of the + /// if converter after moving it to TargetSchedModel). + unsigned computeInstrLatency(const MachineInstr *MI, + bool UseDefaultDefLatency = true) const; /// \brief Output dependency latency of a pair of defs of the same register. /// diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index d92ad42..b8599da 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -823,6 +823,8 @@ public: const MachineInstr *MI, unsigned *PredCost = 0) const; + virtual unsigned getPredicationCost(const MachineInstr *MI) const; + virtual int getInstrLatency(const InstrItineraryData *ItinData, SDNode *Node) const; |