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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-08-16 23:21:55 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-08-16 23:21:55 +0000 |
commit | 083b48af14c8bfa0e96f63ebc889704d09655fd4 (patch) | |
tree | 90d9697be12232acb8a9d695af32125fa6262dc5 /include | |
parent | 053b5b0b3c34d4763511b6dcd8e0150f8e9dd083 (diff) | |
download | external_llvm-083b48af14c8bfa0e96f63ebc889704d09655fd4.zip external_llvm-083b48af14c8bfa0e96f63ebc889704d09655fd4.tar.gz external_llvm-083b48af14c8bfa0e96f63ebc889704d09655fd4.tar.bz2 |
Add ADD and SUB to the predicable ARM instructions.
It is not my plan to duplicate the entire ARM instruction set with
predicated versions. We need a way of representing predicated
instructions in SSA form without requiring a separate opcode.
Then the pseudo-instructions can go away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162061 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions