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authorEvan Cheng <evan.cheng@apple.com>2005-12-08 02:00:36 +0000
committerEvan Cheng <evan.cheng@apple.com>2005-12-08 02:00:36 +0000
commit0fc71988900e600f3ef5b13d9682e2bbab92811d (patch)
treeda55a15927c1eb9a0fb2e8007e0697a08a32e9f3 /include
parentcc827e60b67b2cbcf08a37b119e68081e4171b8a (diff)
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Added support for ComplexPattern. These are patterns that require C++ pattern
matching code that is not currently auto-generated by tblgen, e.g. X86 addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24634 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r--include/llvm/CodeGen/SelectionDAG.h59
1 files changed, 49 insertions, 10 deletions
diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h
index 546b990..f19f148 100644
--- a/include/llvm/CodeGen/SelectionDAG.h
+++ b/include/llvm/CodeGen/SelectionDAG.h
@@ -327,16 +327,6 @@ public:
SDOperand Op1, SDOperand Op2) {
return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2);
}
- SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1,
- MVT::ValueType VT2, SDOperand Op1, SDOperand Op2) {
- std::vector<MVT::ValueType> ResultTys;
- ResultTys.push_back(VT1);
- ResultTys.push_back(VT2);
- std::vector<SDOperand> Ops;
- Ops.push_back(Op1);
- Ops.push_back(Op2);
- return getNode(ISD::BUILTIN_OP_END+Opcode, ResultTys, Ops);
- }
SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT,
SDOperand Op1, SDOperand Op2, SDOperand Op3) {
return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2, Op3);
@@ -355,6 +345,55 @@ public:
std::vector<SDOperand> &Ops) {
return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops);
}
+ SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1,
+ MVT::ValueType VT2, SDOperand Op1, SDOperand Op2) {
+ std::vector<MVT::ValueType> ResultTys;
+ ResultTys.push_back(VT1);
+ ResultTys.push_back(VT2);
+ std::vector<SDOperand> Ops;
+ Ops.push_back(Op1);
+ Ops.push_back(Op2);
+ return getNode(ISD::BUILTIN_OP_END+Opcode, ResultTys, Ops);
+ }
+ SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1,
+ MVT::ValueType VT2, SDOperand Op1, SDOperand Op2,
+ SDOperand Op3) {
+ std::vector<MVT::ValueType> ResultTys;
+ ResultTys.push_back(VT1);
+ ResultTys.push_back(VT2);
+ std::vector<SDOperand> Ops;
+ Ops.push_back(Op1);
+ Ops.push_back(Op2);
+ Ops.push_back(Op3);
+ return getNode(ISD::BUILTIN_OP_END+Opcode, ResultTys, Ops);
+ }
+ SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1,
+ MVT::ValueType VT2, SDOperand Op1, SDOperand Op2,
+ SDOperand Op3, SDOperand Op4) {
+ std::vector<MVT::ValueType> ResultTys;
+ ResultTys.push_back(VT1);
+ ResultTys.push_back(VT2);
+ std::vector<SDOperand> Ops;
+ Ops.push_back(Op1);
+ Ops.push_back(Op2);
+ Ops.push_back(Op3);
+ Ops.push_back(Op4);
+ return getNode(ISD::BUILTIN_OP_END+Opcode, ResultTys, Ops);
+ }
+ SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1,
+ MVT::ValueType VT2, SDOperand Op1, SDOperand Op2,
+ SDOperand Op3, SDOperand Op4, SDOperand Op5) {
+ std::vector<MVT::ValueType> ResultTys;
+ ResultTys.push_back(VT1);
+ ResultTys.push_back(VT2);
+ std::vector<SDOperand> Ops;
+ Ops.push_back(Op1);
+ Ops.push_back(Op2);
+ Ops.push_back(Op3);
+ Ops.push_back(Op4);
+ Ops.push_back(Op5);
+ return getNode(ISD::BUILTIN_OP_END+Opcode, ResultTys, Ops);
+ }
SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1,
MVT::ValueType VT2, std::vector<SDOperand> &Ops) {
std::vector<MVT::ValueType> ResultTys;