* Minor cleanups

* Reduce number of #includes, sometimes drastically (LiveRangeInfo.h lost _7_)
* Move instrIsFeasible() from InstrScheduling.h to SchedPriorities.h
* Delete blank lines at end of files


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1672 91177308-0d34-0410-b5e6-96231b3b80d8

4 files changed, 14 insertions, 45 deletions

diff --git a/include/llvm/CodeGen/InstrScheduling.h b/include/llvm/CodeGen/InstrScheduling.h
index ea15418..c05084a 100644
--- a/include/llvm/CodeGen/InstrScheduling.h
+++ b/include/llvm/CodeGen/InstrScheduling.h
@@ -1,23 +1,15 @@
-// $Id$ -*- C++ -*-
-//***************************************************************************
-// File:
-//	InstrScheduling.h
-// 
-// Purpose:
-//	
-// History:
-//	7/23/01	 -  Vikram Adve  -  Created
-//***************************************************************************
+//===-- InstrScheduling.h - Interface To Instruction Scheduling --*- C++ -*-==//
+//
+// This file defines a minimal, but complete, interface to instruction
+// scheduling.
+//
+//===----------------------------------------------------------------------===//
 
 #ifndef LLVM_CODEGEN_INSTR_SCHEDULING_H
 #define LLVM_CODEGEN_INSTR_SCHEDULING_H
 
-#include "llvm/CodeGen/MachineInstr.h"
-
 class Method;
-class SchedulingManager;
 class TargetMachine;
-class MachineSchedInfo;
 
 //---------------------------------------------------------------------------
 // Function: ScheduleInstructionsWithSSA
@@ -42,18 +34,6 @@ bool ScheduleInstructionsWithSSA(Method *M, const TargetMachine &Target);
 //---------------------------------------------------------------------------
 
 // Not implemented yet.
-bool		ScheduleInstructions		(Method* method,
-						 const TargetMachine &Target);
-
-//---------------------------------------------------------------------------
-// Function: instrIsFeasible
-// 
-// Purpose:
-//   Used by the priority analysis to filter out instructions
-//   that are not feasible to issue in the current cycle.
-//   Should only be used during schedule construction..
-//---------------------------------------------------------------------------
+bool ScheduleInstructions(Method *M, const TargetMachine &Target);
 
-bool		instrIsFeasible			(const SchedulingManager& S,
-						 MachineOpCode opCode);
 #endif
diff --git a/include/llvm/CodeGen/InstrSelectionSupport.h b/include/llvm/CodeGen/InstrSelectionSupport.h
index 33af635..0d5a40e 100644
--- a/include/llvm/CodeGen/InstrSelectionSupport.h
+++ b/include/llvm/CodeGen/InstrSelectionSupport.h
@@ -16,12 +16,7 @@
 
 #include "llvm/Instruction.h"
 #include "llvm/CodeGen/MachineInstr.h"
-class Method;
-class InstrForest;
-class MachineInstr;
 class InstructionNode;
-class TmpInstruction;
-class Constant;
 class TargetMachine;
 
 
@@ -104,8 +99,8 @@ void		Set3OperandsFromInstr	(MachineInstr* minstr,
 // 
 //---------------------------------------------------------------------------
 
-MachineOperand::MachineOperandType
-		ChooseRegOrImmed        (Value* val,
+MachineOperand::MachineOperandType ChooseRegOrImmed(
+                                         Value* val,
                                          MachineOpCode opCode,
                                          const TargetMachine& targetMachine,
                                          bool canUseImmed,
diff --git a/include/llvm/CodeGen/RegAllocCommon.h b/include/llvm/CodeGen/RegAllocCommon.h
index 02b3331..9f8abe3 100644
--- a/include/llvm/CodeGen/RegAllocCommon.h
+++ b/include/llvm/CodeGen/RegAllocCommon.h
@@ -1,11 +1,10 @@
 
-#include "Support/CommandLine.h"
 
 #ifndef REG_ALLOC_COMMON_H
 #define  REG_ALLOC_COMMON_H
 
-// THIS IS NOW SPECIFIED VIA A COMMANDLINE ARGUMENT TO LLC
-//
+#include "Support/CommandLine.h"
+
 // set DEBUG_RA for printing out debug messages
 // if DEBUG_RA is 1 normal output messages
 // if DEBUG_RA is 2 extensive debug info for each instr
diff --git a/include/llvm/CodeGen/RegClass.h b/include/llvm/CodeGen/RegClass.h
index fe25986..1e5f551 100644
--- a/include/llvm/CodeGen/RegClass.h
+++ b/include/llvm/CodeGen/RegClass.h
@@ -10,12 +10,12 @@
 
 #include "llvm/CodeGen/IGNode.h"
 #include "llvm/CodeGen/InterferenceGraph.h"
-#include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/MachineRegInfo.h"
 #include <stack>
 #include <iostream>
+class MachineRegClassInfo;
 
-typedef std::vector<unsigned int> ReservedColorListType;
+typedef std::vector<unsigned> ReservedColorListType;
 
 
 //-----------------------------------------------------------------------------
@@ -35,14 +35,9 @@ typedef std::vector<unsigned int> ReservedColorListType;
 //   methods are called thru a register class.
 //
 //-----------------------------------------------------------------------------
-class RegClass
-{
-
- private:
+class RegClass {
   const Method *const Meth;             // Method we are working on
-
   const MachineRegClassInfo *const MRC; // corresponding MRC
-
   const unsigned RegClassID;            // my int ID
 
   InterferenceGraph IG;                 // Interference graph - constructed by