Make SubRegIndex size mandatory, following r183020.

This also makes TableGen able to compute sizes/offsets of synthesized
indices representing tuples.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183061 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 16 insertions, 8 deletions

diff --git a/include/llvm/MC/MCRegisterInfo.h b/include/llvm/MC/MCRegisterInfo.h
index 002f71d..3fa89c1 100644
--- a/include/llvm/MC/MCRegisterInfo.h
+++ b/include/llvm/MC/MCRegisterInfo.h
@@ -338,12 +338,15 @@ public:
   /// otherwise.
   unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;
 
-  /// \brief Get the bit range covered by a given sub-register index.
-  /// In some cases, for instance non-contiguous synthesized indices,
-  /// there is no meaningful bit range to get, so return true if \p Offset
-  /// and \p Size were set.
-  bool getSubRegIdxCoveredBits(unsigned Idx,
-                               unsigned &Offset, unsigned &Size) const;
+  /// \brief Get the size of the bit range covered by a sub-register index.
+  /// If the index isn't continuous, return the sum of the sizes of its parts.
+  /// If the index is used to access subregisters of different sizes, return -1.
+  unsigned getSubRegIdxSize(unsigned Idx) const;
+
+  /// \brief Get the offset of the bit range covered by a sub-register index.
+  /// If an Offset doesn't make sense (the index isn't continuous, or is used to
+  /// access sub-registers at different offsets), return -1.
+  unsigned getSubRegIdxOffset(unsigned Idx) const;
 
   /// \brief Return the human-readable symbolic target-specific name for the
   /// specified physical register.
diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td
index c201f6b..a9644d4 100644
--- a/include/llvm/Target/Target.td
+++ b/include/llvm/Target/Target.td
@@ -22,13 +22,16 @@ include "llvm/IR/Intrinsics.td"
 class RegisterClass; // Forward def
 
 // SubRegIndex - Use instances of SubRegIndex to identify subregisters.
-class SubRegIndex<int size = -1, int offset = 0> {
+class SubRegIndex<int size, int offset = 0> {
   string Namespace = "";
 
   // Size - Size (in bits) of the sub-registers represented by this index.
   int Size = size;
 
   // Offset - Offset of the first bit that is part of this sub-register index.
+  // Set it to -1 if the same index is used to represent sub-registers that can
+  // be at different offsets (for example when using an index to access an
+  // element in a register tuple).
   int Offset = offset;
 
   // ComposedOf - A list of two SubRegIndex instances, [A, B].
@@ -58,7 +61,9 @@ class SubRegIndex<int size = -1, int offset = 0> {
 // ComposedSubRegIndex - A sub-register that is the result of composing A and B.
 // Offset is set to the sum of A and B's Offsets. Size is set to B's Size.
 class ComposedSubRegIndex<SubRegIndex A, SubRegIndex B>
-  : SubRegIndex<B.Size, -1> {
+  : SubRegIndex<B.Size, !if(!eq(A.Offset, -1), -1,
+                        !if(!eq(B.Offset, -1), -1,
+                            !add(A.Offset, B.Offset)))> {
   // See SubRegIndex.
   let ComposedOf = [A, B];
 }