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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-08-28 03:11:32 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-08-28 03:11:32 +0000 |
| commit | 36d29bc72345d882623b001c2692b9246a19688a (patch) | |
| tree | 49a7f2440838b5a7c679f3cb6125268f55e19126 /include | |
| parent | cff9baa95273bc279bf5fadb9e27afbd25cca20b (diff) | |
| download | external_llvm-36d29bc72345d882623b001c2692b9246a19688a.zip external_llvm-36d29bc72345d882623b001c2692b9246a19688a.tar.gz external_llvm-36d29bc72345d882623b001c2692b9246a19688a.tar.bz2 | |
Remove extra MayLoad/MayStore flags from atomic_load/store.
These extra flags are not required to properly order the atomic
load/store instructions. SelectionDAGBuilder chains atomics as if they
were volatile, and SelectionDAG::getAtomic() sets the isVolatile bit on
the memory operands of all atomic operations.
The volatile bit is enough to order atomic loads and stores during and
after SelectionDAG.
This means we set mayLoad on atomic_load, mayStore on atomic_store, and
mayLoad+mayStore on the remaining atomic read-modify-write operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162733 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
| -rw-r--r-- | include/llvm/CodeGen/SelectionDAGNodes.h | 5 | ||||
| -rw-r--r-- | include/llvm/Target/TargetSelectionDAG.td | 4 |
2 files changed, 2 insertions, 7 deletions
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index db361ee..119adaa 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -1011,11 +1011,6 @@ class AtomicSDNode : public MemSDNode { SubclassData |= SynchScope << 12; assert(getOrdering() == Ordering && "Ordering encoding error!"); assert(getSynchScope() == SynchScope && "Synch-scope encoding error!"); - - assert((readMem() || getOrdering() <= Monotonic) && - "Acquire/Release MachineMemOperand must be a load!"); - assert((writeMem() || getOrdering() <= Monotonic) && - "Acquire/Release MachineMemOperand must be a store!"); } public: diff --git a/include/llvm/Target/TargetSelectionDAG.td b/include/llvm/Target/TargetSelectionDAG.td index 3f81c06..83bd787 100644 --- a/include/llvm/Target/TargetSelectionDAG.td +++ b/include/llvm/Target/TargetSelectionDAG.td @@ -445,9 +445,9 @@ def atomic_load_umin : SDNode<"ISD::ATOMIC_LOAD_UMIN", SDTAtomic2, def atomic_load_umax : SDNode<"ISD::ATOMIC_LOAD_UMAX", SDTAtomic2, [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; def atomic_load : SDNode<"ISD::ATOMIC_LOAD", SDTAtomicLoad, - [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; + [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; def atomic_store : SDNode<"ISD::ATOMIC_STORE", SDTAtomicStore, - [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; + [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; // Do not use ld, st directly. Use load, extload, sextload, zextload, store, // and truncst (see below). |