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authorDaniel Sanders <daniel.sanders@imgtec.com>2013-10-17 13:38:20 +0000
committerDaniel Sanders <daniel.sanders@imgtec.com>2013-10-17 13:38:20 +0000
commit52244da7f2b3def646900520668b859343b84a33 (patch)
tree45c534f9df0dac583208d73fe5c68bc96f4ec0b4 /include
parent2e56d575b7ea507684935d5cd6d5aee96d72ceb4 (diff)
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[mips][msa] Added lsa instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192895 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r--include/llvm/IR/IntrinsicsMips.td6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/llvm/IR/IntrinsicsMips.td b/include/llvm/IR/IntrinsicsMips.td
index 4824ae5..0634c18 100644
--- a/include/llvm/IR/IntrinsicsMips.td
+++ b/include/llvm/IR/IntrinsicsMips.td
@@ -1251,6 +1251,12 @@ def int_mips_ldi_w : GCCBuiltin<"__builtin_msa_ldi_w">,
def int_mips_ldi_d : GCCBuiltin<"__builtin_msa_ldi_d">,
Intrinsic<[llvm_v2i64_ty], [llvm_i32_ty], [IntrNoMem]>;
+// This instruction is part of the MSA spec but it does not share the
+// __builtin_msa prefix because it operates on the GPR registers.
+def int_mips_lsa : GCCBuiltin<"__builtin_mips_lsa">,
+ Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
+ [IntrNoMem]>;
+
def int_mips_madd_q_h : GCCBuiltin<"__builtin_msa_madd_q_h">,
Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty],
[IntrNoMem]>;