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author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-10-18 00:02:06 +0000 |
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committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-10-18 00:02:06 +0000 |
commit | 5684c4e2b41f1d6ddf70b116a84f438040f66297 (patch) | |
tree | 52043b598f1db755542f97790bad3d2a49b0771b /include | |
parent | 30764b8366d91438b13e8a7c792918b357da7d91 (diff) | |
download | external_llvm-5684c4e2b41f1d6ddf70b116a84f438040f66297.zip external_llvm-5684c4e2b41f1d6ddf70b116a84f438040f66297.tar.gz external_llvm-5684c4e2b41f1d6ddf70b116a84f438040f66297.tar.bz2 |
Added virtual function to generate an instruction sequence to
load a constant into a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@862 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r-- | include/llvm/Target/MachineInstrInfo.h | 20 | ||||
-rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 20 |
2 files changed, 40 insertions, 0 deletions
diff --git a/include/llvm/Target/MachineInstrInfo.h b/include/llvm/Target/MachineInstrInfo.h index 5106a26..d0294ca 100644 --- a/include/llvm/Target/MachineInstrInfo.h +++ b/include/llvm/Target/MachineInstrInfo.h @@ -9,8 +9,13 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/Support/DataTypes.h" +#include <vector> class MachineInstrDescriptor; +class TmpInstruction; +class MachineInstr; +class Value; +class Instruction; typedef int InstrSchedClass; @@ -211,6 +216,21 @@ public: isSignExtended = getDescriptor(opCode).immedIsSignExtended; return getDescriptor(opCode).maxImmedConst; } + + //------------------------------------------------------------------------- + // Code generation support for creating individual machine instructions + //------------------------------------------------------------------------- + + // Create an instruction sequence to put the constant `val' into + // the virtual register `dest'. `val' may be a ConstPoolVal or a + // GlobalValue, viz., the constant address of a global variable or function. + // The generated instructions are returned in `minstrVec'. + // Any temp. registers (TmpInstruction) created are returned in `tempVec'. + // + virtual void CreateCodeToLoadConst(Value* val, + Instruction* dest, + vector<MachineInstr*>& minstrVec, + vector<TmpInstruction*>& temps) const =0; }; #endif diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 5106a26..d0294ca 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -9,8 +9,13 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/Support/DataTypes.h" +#include <vector> class MachineInstrDescriptor; +class TmpInstruction; +class MachineInstr; +class Value; +class Instruction; typedef int InstrSchedClass; @@ -211,6 +216,21 @@ public: isSignExtended = getDescriptor(opCode).immedIsSignExtended; return getDescriptor(opCode).maxImmedConst; } + + //------------------------------------------------------------------------- + // Code generation support for creating individual machine instructions + //------------------------------------------------------------------------- + + // Create an instruction sequence to put the constant `val' into + // the virtual register `dest'. `val' may be a ConstPoolVal or a + // GlobalValue, viz., the constant address of a global variable or function. + // The generated instructions are returned in `minstrVec'. + // Any temp. registers (TmpInstruction) created are returned in `tempVec'. + // + virtual void CreateCodeToLoadConst(Value* val, + Instruction* dest, + vector<MachineInstr*>& minstrVec, + vector<TmpInstruction*>& temps) const =0; }; #endif |