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authorChris Lattner <sabre@nondot.org>2010-03-01 18:47:11 +0000
committerChris Lattner <sabre@nondot.org>2010-03-01 18:47:11 +0000
commit7390eebd49b786f3293d24f76fedb02fe183468c (patch)
tree54249951ff447cd82835bacb164eff91106c0b80 /include
parentd1f94e90fdb5fc4ff57d7544fde017e1223bd9e9 (diff)
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Accelerate isel dispatch for tables that start with a top-level
OPC_SwitchOpcode to use a table lookup instead of having to go through the interpreter for this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97469 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r--include/llvm/CodeGen/SelectionDAGISel.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/SelectionDAGISel.h b/include/llvm/CodeGen/SelectionDAGISel.h
index fa3b08f..6ed9f49 100644
--- a/include/llvm/CodeGen/SelectionDAGISel.h
+++ b/include/llvm/CodeGen/SelectionDAGISel.h
@@ -245,6 +245,10 @@ private:
/// one preferred by the target.
///
ScheduleDAGSDNodes *CreateScheduler();
+
+ /// OpcodeOffset - This is a cache used to dispatch efficiently into isel
+ /// state machines that start with a OPC_SwitchOpcode node.
+ std::vector<unsigned> OpcodeOffset;
};
}