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authorNate Begeman <natebegeman@mac.com>2007-05-01 05:57:02 +0000
committerNate Begeman <natebegeman@mac.com>2007-05-01 05:57:02 +0000
commit7bf1c272ab27297a7bbab329de3f17ddb26e02a3 (patch)
tree6fc181f3207ebd7bc26e82219f7f61d2d56f77ac /include
parent980e5aad4cfaa32e13b297f4201eb1088ca96cc4 (diff)
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llvm bug #1350, parts 1, 2, and 3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36618 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r--include/llvm/CodeGen/MachineInstr.h47
-rw-r--r--include/llvm/Target/MRegisterInfo.h6
2 files changed, 36 insertions, 17 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index a81c70e..a6e14e2 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -71,10 +71,17 @@ private:
// immediately after the write. i.e. A register
// that is defined but never used.
- /// offset - Offset to address of global or external, only valid for
- /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
- int offset;
-
+ /// auxInfo - auxiliary information used by the MachineOperand
+ union {
+ /// offset - Offset to address of global or external, only valid for
+ /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
+ int offset;
+
+ /// subReg - SubRegister number, only valid for MO_Register. A value of 0
+ /// indicates the MO_Register has no subReg.
+ unsigned subReg;
+ } auxInfo;
+
MachineOperand() {}
void print(std::ostream &os) const;
@@ -95,7 +102,7 @@ public:
Op.IsImp = false;
Op.IsKill = false;
Op.IsDead = false;
- Op.offset = 0;
+ Op.auxInfo.offset = 0;
return Op;
}
@@ -106,7 +113,7 @@ public:
IsKill = MO.IsKill;
IsDead = MO.IsDead;
opType = MO.opType;
- offset = MO.offset;
+ auxInfo = MO.auxInfo;
return *this;
}
@@ -169,7 +176,11 @@ public:
int getOffset() const {
assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
"Wrong MachineOperand accessor");
- return offset;
+ return auxInfo.offset;
+ }
+ unsigned getSubReg() const {
+ assert(isRegister() && "Wrong MachineOperand accessor");
+ return auxInfo.subReg;
}
const char *getSymbolName() const {
assert(isExternalSymbol() && "Wrong MachineOperand accessor");
@@ -254,7 +265,11 @@ public:
assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex() ||
isJumpTableIndex()) &&
"Wrong MachineOperand accessor");
- offset = Offset;
+ auxInfo.offset = Offset;
+ }
+ void setSubReg(unsigned subReg) {
+ assert(isRegister() && "Wrong MachineOperand accessor");
+ auxInfo.subReg = subReg;
}
void setConstantPoolIndex(unsigned Idx) {
assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
@@ -433,7 +448,7 @@ public:
Op.IsKill = IsKill;
Op.IsDead = IsDead;
Op.contents.RegNo = Reg;
- Op.offset = 0;
+ Op.auxInfo.subReg = 0;
}
/// addImmOperand - Add a zero extended constant argument to the
@@ -443,14 +458,14 @@ public:
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_Immediate;
Op.contents.immedVal = Val;
- Op.offset = 0;
+ Op.auxInfo.offset = 0;
}
void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_MachineBasicBlock;
Op.contents.MBB = MBB;
- Op.offset = 0;
+ Op.auxInfo.offset = 0;
}
/// addFrameIndexOperand - Add an abstract frame index to the instruction
@@ -459,7 +474,7 @@ public:
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_FrameIndex;
Op.contents.immedVal = Idx;
- Op.offset = 0;
+ Op.auxInfo.offset = 0;
}
/// addConstantPoolndexOperand - Add a constant pool object index to the
@@ -469,7 +484,7 @@ public:
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_ConstantPoolIndex;
Op.contents.immedVal = Idx;
- Op.offset = Offset;
+ Op.auxInfo.offset = Offset;
}
/// addJumpTableIndexOperand - Add a jump table object index to the
@@ -479,14 +494,14 @@ public:
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_JumpTableIndex;
Op.contents.immedVal = Idx;
- Op.offset = 0;
+ Op.auxInfo.offset = 0;
}
void addGlobalAddressOperand(GlobalValue *GV, int Offset) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_GlobalAddress;
Op.contents.GV = GV;
- Op.offset = Offset;
+ Op.auxInfo.offset = Offset;
}
/// addExternalSymbolOperand - Add an external symbol operand to this instr
@@ -495,7 +510,7 @@ public:
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_ExternalSymbol;
Op.contents.SymbolName = SymName;
- Op.offset = 0;
+ Op.auxInfo.offset = 0;
}
//===--------------------------------------------------------------------===//
diff --git a/include/llvm/Target/MRegisterInfo.h b/include/llvm/Target/MRegisterInfo.h
index 4b9389a..da4b750 100644
--- a/include/llvm/Target/MRegisterInfo.h
+++ b/include/llvm/Target/MRegisterInfo.h
@@ -41,7 +41,7 @@ class Type;
/// The SubRegs field is a zero terminated array of registers that are
/// sub-registers of the specific register, e.g. AL, AH are sub-registers of AX.
/// The SuperRegs field is a zero terminated array of registers that are
-/// super-registers of the specific register, e.g. RAX, EAX, are sub-registers
+/// super-registers of the specific register, e.g. RAX, EAX, are super-registers
/// of AX.
///
struct TargetRegisterDesc {
@@ -354,6 +354,10 @@ public:
/// register scavenger to determine what registers are free.
virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0;
+ /// getSubReg - Returns the physical register number of sub-register "Index"
+ /// for physical register RegNo.
+ virtual unsigned getSubReg(unsigned RegNo, unsigned Index) const = 0;
+
//===--------------------------------------------------------------------===//
// Register Class Information
//