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authorBill Wendling <isanbard@gmail.com>2007-01-24 03:36:05 +0000
committerBill Wendling <isanbard@gmail.com>2007-01-24 03:36:05 +0000
commit841056a2ad6fce7786378a27aced46e37122259f (patch)
tree97b6ff579f0ff6c2dabf68c1a35dcaa42ae544bd /include
parente966d6415ce3a9a6ef113ea4382131f46eb55540 (diff)
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New "TargetMachOWriterInfo" class. It holds target-specific information
that the MachOWriter needs in order to do its writing stuff 'n things. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33475 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r--include/llvm/Target/TargetMachOWriterInfo.h103
1 files changed, 103 insertions, 0 deletions
diff --git a/include/llvm/Target/TargetMachOWriterInfo.h b/include/llvm/Target/TargetMachOWriterInfo.h
new file mode 100644
index 0000000..6276bcf
--- /dev/null
+++ b/include/llvm/Target/TargetMachOWriterInfo.h
@@ -0,0 +1,103 @@
+//===-- llvm/Target/TargetMachOWriterInfo.h - MachO Writer Info--*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by Bill Wendling and is distributed under the
+// University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the TargetMachOWriterInfo class.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_TARGET_TARGETMACHOWRITERINFO_H
+#define LLVM_TARGET_TARGETMACHOWRITERINFO_H
+
+#include "llvm/CodeGen/MachineRelocation.h"
+
+namespace llvm {
+
+ class MachineBasicBlock;
+
+ //===--------------------------------------------------------------------===//
+ // TargetMachOWriterInfo
+ //===--------------------------------------------------------------------===//
+
+ struct TargetMachOWriterInfo {
+ uint32_t CPUType; // CPU specifier
+ uint32_t CPUSubType; // Machine specifier
+
+ // The various CPU_TYPE_* constants are already defined by at least one
+ // system header file and create compilation errors if not respected.
+#if !defined(CPU_TYPE_I386)
+#define CPU_TYPE_I386 7
+#endif
+#if !defined(CPU_TYPE_X86_64)
+#define CPU_TYPE_X86_64 (CPU_TYPE_I386 | 0x1000000)
+#endif
+#if !defined(CPU_TYPE_ARM)
+#define CPU_TYPE_ARM 12
+#endif
+#if !defined(CPU_TYPE_SPARC)
+#define CPU_TYPE_SPARC 14
+#endif
+#if !defined(CPU_TYPE_POWERPC)
+#define CPU_TYPE_POWERPC 18
+#endif
+#if !defined(CPU_TYPE_POWERPC64)
+#define CPU_TYPE_POWERPC64 (CPU_TYPE_POWERPC | 0x1000000)
+#endif
+
+ // Constants for the cputype field
+ // see <mach/machine.h>
+ enum {
+ HDR_CPU_TYPE_I386 = CPU_TYPE_I386,
+ HDR_CPU_TYPE_X86_64 = CPU_TYPE_X86_64,
+ HDR_CPU_TYPE_ARM = CPU_TYPE_ARM,
+ HDR_CPU_TYPE_SPARC = CPU_TYPE_SPARC,
+ HDR_CPU_TYPE_POWERPC = CPU_TYPE_POWERPC,
+ HDR_CPU_TYPE_POWERPC64 = CPU_TYPE_POWERPC64
+ };
+
+#if !defined(CPU_SUBTYPE_I386_ALL)
+#define CPU_SUBTYPE_I386_ALL 3
+#endif
+#if !defined(CPU_SUBTYPE_X86_64_ALL)
+#define CPU_SUBTYPE_X86_64_ALL 3
+#endif
+#if !defined(CPU_SUBTYPE_ARM_ALL)
+#define CPU_SUBTYPE_ARM_ALL 0
+#endif
+#if !defined(CPU_SUBTYPE_SPARC_ALL)
+#define CPU_SUBTYPE_SPARC_ALL 0
+#endif
+#if !defined(CPU_SUBTYPE_POWERPC_ALL)
+#define CPU_SUBTYPE_POWERPC_ALL 0
+#endif
+
+ // Constants for the cpusubtype field
+ // see <mach/machine.h>
+ enum {
+ HDR_CPU_SUBTYPE_I386_ALL = CPU_SUBTYPE_I386_ALL,
+ HDR_CPU_SUBTYPE_X86_64_ALL = CPU_SUBTYPE_X86_64_ALL,
+ HDR_CPU_SUBTYPE_ARM_ALL = CPU_SUBTYPE_ARM_ALL,
+ HDR_CPU_SUBTYPE_SPARC_ALL = CPU_SUBTYPE_SPARC_ALL,
+ HDR_CPU_SUBTYPE_POWERPC_ALL = CPU_SUBTYPE_POWERPC_ALL
+ };
+
+ TargetMachOWriterInfo(uint32_t cputype, uint32_t cpusubtype)
+ : CPUType(cputype), CPUSubType(cpusubtype) {}
+ virtual ~TargetMachOWriterInfo() {}
+
+ virtual MachineRelocation GetJTRelocation(unsigned Offset,
+ MachineBasicBlock *MBB) const;
+
+ virtual const char *getPassName() const {
+ return "Mach-O Writer";
+ }
+ };
+
+} // end llvm namespace
+
+#endif // LLVM_TARGET_TARGETMACHOWRITERINFO_H