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| author | Roman Levenstein <romix.llvm@googlemail.com> | 2008-04-29 09:07:59 +0000 |
|---|---|---|
| committer | Roman Levenstein <romix.llvm@googlemail.com> | 2008-04-29 09:07:59 +0000 |
| commit | 85078e24b21a2e70e3a697a36bc0732fac3c0187 (patch) | |
| tree | 5bd69deb9eb3060895d6b56424cb53f9a9f4cc2b /include | |
| parent | a244a39772791f01871e87985907d8b184ccec8f (diff) | |
| download | external_llvm-85078e24b21a2e70e3a697a36bc0732fac3c0187.zip external_llvm-85078e24b21a2e70e3a697a36bc0732fac3c0187.tar.gz external_llvm-85078e24b21a2e70e3a697a36bc0732fac3c0187.tar.bz2 | |
Use std::set instead of std::priority_queue for the RegReductionPriorityQueue.
This removes the existing bottleneck related to the removal of elements from
the middle of the queue.
Also fixes a subtle bug in ScheduleDAGRRList::CapturePred:
It was updating the state of the SUnit before removing it. As a result, the
comparison operators were working incorrectly and this SUnit could not be removed
from the queue properly.
Reviewed by Evan and Dan. Approved by Dan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50412 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
| -rw-r--r-- | include/llvm/CodeGen/ScheduleDAG.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h index bc9ec11..c611bfa 100644 --- a/include/llvm/CodeGen/ScheduleDAG.h +++ b/include/llvm/CodeGen/ScheduleDAG.h @@ -112,6 +112,7 @@ namespace llvm { typedef SmallVector<SDep, 4>::const_iterator const_succ_iterator; unsigned NodeNum; // Entry # of node in the node vector. + unsigned NodeQueueId; // Queue id of node. unsigned short Latency; // Node latency. short NumPreds; // # of preds. short NumSuccs; // # of sucss. @@ -131,7 +132,7 @@ namespace llvm { const TargetRegisterClass *CopySrcRC; SUnit(SDNode *node, unsigned nodenum) - : Node(node), InstanceNo(0), NodeNum(nodenum), Latency(0), + : Node(node), InstanceNo(0), NodeNum(nodenum), NodeQueueId(0), Latency(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), NumSuccsLeft(0), isTwoAddress(false), isCommutable(false), hasPhysRegDefs(false), isPending(false), isAvailable(false), isScheduled(false), |