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authorDaniel Dunbar <daniel@zuster.org>2010-10-19 17:14:24 +0000
committerDaniel Dunbar <daniel@zuster.org>2010-10-19 17:14:24 +0000
commit98694138025fdb0cec0cda5727201ad00ded3d63 (patch)
tree069867aa0faebfa45f69541d5627f77ebe342fdb /include
parentf3a925dc7a14ade42da442b49c304c064954c1d4 (diff)
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Revert r116781 "- Add a hook for target to determine whether an instruction def
is", which breaks some nightly tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116816 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r--include/llvm/Target/TargetInstrInfo.h14
1 files changed, 0 insertions, 14 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 936345c..6615ee4 100644
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -24,7 +24,6 @@ class InstrItineraryData;
class LiveVariables;
class MCAsmInfo;
class MachineMemOperand;
-class MachineRegisterInfo;
class MDNode;
class MCInst;
class SDNode;
@@ -626,19 +625,6 @@ public:
int getOperandLatency(const InstrItineraryData *ItinData,
SDNode *DefNode, unsigned DefIdx,
SDNode *UseNode, unsigned UseIdx) const;
-
- /// hasHighOperandLatency - Compute operand latency between a def of 'Reg'
- /// and an use in the current loop, return true if the target considered
- /// it 'high'. This is used by optimization passes such as machine LICM to
- /// determine whether it makes sense to hoist an instruction out even in
- /// high register pressure situation.
- virtual
- bool hasHighOperandLatency(const InstrItineraryData *ItinData,
- const MachineRegisterInfo *MRI,
- const MachineInstr *DefMI, unsigned DefIdx,
- const MachineInstr *UseMI, unsigned UseIdx) const {
- return false;
- }
};
/// TargetInstrInfoImpl - This is the default implementation of