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authorAndrew Trick <atrick@apple.com>2012-11-13 08:47:29 +0000
committerAndrew Trick <atrick@apple.com>2012-11-13 08:47:29 +0000
commitad1cc1d1bfc0accd3f1af5c02ac367ff46a4bfdf (patch)
tree7e6931fc7c328f60aee2caa419f95ee78dc1b62e /include
parent265058d9239e6867d06dc8aa40db5f33390abd17 (diff)
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misched: Allow subtargets to enable misched and dependent options.
This allows me to begin enabling (or backing out) misched by default for one subtarget at a time. To run misched we typically want to: - Disable SelectionDAG scheduling (use the source order scheduler) - Enable more aggressive coalescing (until we decide to always run the coalescer this way) - Enable MachineScheduler pass itself. Disabling PostRA sched may follow for some subtargets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167826 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r--include/llvm/Target/TargetSubtargetInfo.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/include/llvm/Target/TargetSubtargetInfo.h b/include/llvm/Target/TargetSubtargetInfo.h
index 6db96d9..3f22f47 100644
--- a/include/llvm/Target/TargetSubtargetInfo.h
+++ b/include/llvm/Target/TargetSubtargetInfo.h
@@ -54,6 +54,13 @@ public:
return 0;
}
+ /// \brief True if the subtarget should run MachineScheduler after aggressive
+ /// coalescing.
+ ///
+ /// This currently replaces the SelectionDAG scheduler with the "source" order
+ /// scheduler. It does not yet disable the postRA scheduler.
+ virtual bool enableMachineScheduler() const;
+
// enablePostRAScheduler - If the target can benefit from post-regalloc
// scheduling and the specified optimization level meets the requirement
// return true to enable post-register-allocation scheduling. In