Rename TargetLowering::getNumElements and friends to

TargetLowering::getNumRegisters and similar, to avoid confusion with
the actual number of elements for vector types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37687 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 4 insertions, 4 deletions

diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index 61c03b6..de51945 100644
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -347,12 +347,12 @@ public:
     return VT == MVT::iPTR ? PointerTy : VT;
   }
 
-  /// getNumElements - Return the number of registers that this ValueType will
+  /// getNumRegisters - Return the number of registers that this ValueType will
   /// eventually require.  This is one for any types promoted to live in larger
   /// registers, but may be more than one for types (like i64) that are split
   /// into pieces.
-  unsigned getNumElements(MVT::ValueType VT) const {
-    return NumElementsForVT[VT];
+  unsigned getNumRegisters(MVT::ValueType VT) const {
+    return NumRegistersForVT[VT];
   }
   
   /// hasTargetDAGCombine - If true, the target has custom DAG combine
@@ -1035,7 +1035,7 @@ private:
   /// RegClassForVT - This indicates the default register class to use for
   /// each ValueType the target supports natively.
   TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE];
-  unsigned char NumElementsForVT[MVT::LAST_VALUETYPE];
+  unsigned char NumRegistersForVT[MVT::LAST_VALUETYPE];
 
   /// TransformToType - For any value types we are promoting or expanding, this
   /// contains the value type that we are changing to.  For Expanded types, this