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author | Michael Liao <michael.liao@intel.com> | 2012-11-08 07:28:54 +0000 |
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committer | Michael Liao <michael.liao@intel.com> | 2012-11-08 07:28:54 +0000 |
commit | be02a90de17f857ba65bbd8a11653ca1bad30adc (patch) | |
tree | ca8ccf2e856410b18f269335eb1b8ed98c1c1426 /include | |
parent | 7629de3326318e533ab969abd1b0cbc569b3f3b7 (diff) | |
download | external_llvm-be02a90de17f857ba65bbd8a11653ca1bad30adc.zip external_llvm-be02a90de17f857ba65bbd8a11653ca1bad30adc.tar.gz external_llvm-be02a90de17f857ba65bbd8a11653ca1bad30adc.tar.bz2 |
Add support of RTM from TSX extension
- Add RTM code generation support throught 3 X86 intrinsics:
xbegin()/xend() to start/end a transaction region, and xabort() to abort a
tranaction region
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167573 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r-- | include/llvm/IntrinsicsX86.td | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/llvm/IntrinsicsX86.td b/include/llvm/IntrinsicsX86.td index 5ff0856..d2463c0 100644 --- a/include/llvm/IntrinsicsX86.td +++ b/include/llvm/IntrinsicsX86.td @@ -2559,3 +2559,15 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_rdrand_32 : Intrinsic<[llvm_i32_ty, llvm_i32_ty], [], []>; def int_x86_rdrand_64 : Intrinsic<[llvm_i64_ty, llvm_i32_ty], [], []>; } + +//===----------------------------------------------------------------------===// +// RTM intrinsics. Transactional Memory support. + +let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + def int_x86_xbegin : GCCBuiltin<"__builtin_ia32_xbegin">, + Intrinsic<[llvm_i32_ty], [], []>; + def int_x86_xend : GCCBuiltin<"__builtin_ia32_xend">, + Intrinsic<[], [], []>; + def int_x86_xabort : GCCBuiltin<"__builtin_ia32_xabort">, + Intrinsic<[], [llvm_i8_ty], [IntrNoReturn]>; +} |