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author | Evan Cheng <evan.cheng@apple.com> | 2007-11-14 07:59:08 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-11-14 07:59:08 +0000 |
commit | c498b0281fa81bc213ad1a1228664d480936c0e6 (patch) | |
tree | 9f5398569fe93f7e9c1f427daff5b051ecbcb14c /include | |
parent | f9572a4c2bcdec54ea70c7b14f4ac6b38cfdd70c (diff) | |
download | external_llvm-c498b0281fa81bc213ad1a1228664d480936c0e6.zip external_llvm-c498b0281fa81bc213ad1a1228664d480936c0e6.tar.gz external_llvm-c498b0281fa81bc213ad1a1228664d480936c0e6.tar.bz2 |
Clean up sub-register implementation by moving subReg information back to
MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44104 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r-- | include/llvm/CodeGen/MachineInstr.h | 16 | ||||
-rw-r--r-- | include/llvm/CodeGen/MachineInstrBuilder.h | 4 | ||||
-rw-r--r-- | include/llvm/CodeGen/SSARegMap.h | 19 |
3 files changed, 17 insertions, 22 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index 9d0d8d9..93b739d 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -76,6 +76,10 @@ private: /// offset - Offset to address of global or external, only valid for /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex int offset; + + /// subReg - SubRegister number, only valid for MO_Register. A value of 0 + /// indicates the MO_Register has no subReg. + unsigned subReg; } auxInfo; MachineOperand() {} @@ -182,6 +186,10 @@ public: "Wrong MachineOperand accessor"); return auxInfo.offset; } + unsigned getSubReg() const { + assert(isRegister() && "Wrong MachineOperand accessor"); + return auxInfo.subReg; + } const char *getSymbolName() const { assert(isExternalSymbol() && "Wrong MachineOperand accessor"); return contents.SymbolName; @@ -267,6 +275,10 @@ public: "Wrong MachineOperand accessor"); auxInfo.offset = Offset; } + void setSubReg(unsigned subReg) { + assert(isRegister() && "Wrong MachineOperand accessor"); + auxInfo.subReg = subReg; + } void setConstantPoolIndex(unsigned Idx) { assert(isConstantPoolIndex() && "Wrong MachineOperand accessor"); contents.immedVal = Idx; @@ -451,7 +463,8 @@ public: /// addRegOperand - Add a register operand. /// void addRegOperand(unsigned Reg, bool IsDef, bool IsImp = false, - bool IsKill = false, bool IsDead = false) { + bool IsKill = false, bool IsDead = false, + unsigned SubReg = 0) { MachineOperand &Op = AddNewOperand(IsImp); Op.opType = MachineOperand::MO_Register; Op.IsDef = IsDef; @@ -459,6 +472,7 @@ public: Op.IsKill = IsKill; Op.IsDead = IsDead; Op.contents.RegNo = Reg; + Op.auxInfo.subReg = SubReg; } /// addImmOperand - Add a zero extended constant argument to the diff --git a/include/llvm/CodeGen/MachineInstrBuilder.h b/include/llvm/CodeGen/MachineInstrBuilder.h index b2361a5..c62f67b 100644 --- a/include/llvm/CodeGen/MachineInstrBuilder.h +++ b/include/llvm/CodeGen/MachineInstrBuilder.h @@ -39,8 +39,8 @@ public: const MachineInstrBuilder &addReg(unsigned RegNo, bool isDef = false, bool isImp = false, bool isKill = false, - bool isDead = false) const { - MI->addRegOperand(RegNo, isDef, isImp, isKill, isDead); + bool isDead = false, unsigned SubReg = 0) const { + MI->addRegOperand(RegNo, isDef, isImp, isKill, isDead, SubReg); return *this; } diff --git a/include/llvm/CodeGen/SSARegMap.h b/include/llvm/CodeGen/SSARegMap.h index a92222a..97d8d69 100644 --- a/include/llvm/CodeGen/SSARegMap.h +++ b/include/llvm/CodeGen/SSARegMap.h @@ -26,7 +26,6 @@ class TargetRegisterClass; class SSARegMap { IndexedMap<const TargetRegisterClass*, VirtReg2IndexFunctor> RegClassMap; - IndexedMap<std::pair<unsigned, unsigned>, VirtReg2IndexFunctor> RegSubIdxMap; unsigned NextRegNum; public: @@ -43,30 +42,12 @@ class SSARegMap { assert(RegClass && "Cannot create register without RegClass!"); RegClassMap.grow(NextRegNum); RegClassMap[NextRegNum] = RegClass; - RegSubIdxMap.grow(NextRegNum); - RegSubIdxMap[NextRegNum] = std::make_pair(0,0); return NextRegNum++; } unsigned getLastVirtReg() const { return NextRegNum - 1; } - - void setIsSubRegister(unsigned Reg, unsigned SuperReg, unsigned SubIdx) { - RegSubIdxMap[Reg] = std::make_pair(SuperReg, SubIdx); - } - - bool isSubRegister(unsigned Reg) const { - return RegSubIdxMap[Reg].first != 0; - } - - unsigned getSuperRegister(unsigned Reg) const { - return RegSubIdxMap[Reg].first; - } - - unsigned getSubRegisterIndex(unsigned Reg) const { - return RegSubIdxMap[Reg].second; - } }; } // End llvm namespace |