diff options
author | Nate Begeman <natebegeman@mac.com> | 2009-04-29 05:20:52 +0000 |
---|---|---|
committer | Nate Begeman <natebegeman@mac.com> | 2009-04-29 05:20:52 +0000 |
commit | e8f61cb78f84e6fd82dabd4a5ab85691e70a7e88 (patch) | |
tree | 6483f04d2e9e63d4a4f2ade6113f882a78359039 /include | |
parent | babc5c414464598c321c9889ad4cfa35581cbd53 (diff) | |
download | external_llvm-e8f61cb78f84e6fd82dabd4a5ab85691e70a7e88.zip external_llvm-e8f61cb78f84e6fd82dabd4a5ab85691e70a7e88.tar.gz external_llvm-e8f61cb78f84e6fd82dabd4a5ab85691e70a7e88.tar.bz2 |
Implement review feedback for vector shuffle work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70372 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r-- | include/llvm/CodeGen/SelectionDAG.h | 4 | ||||
-rw-r--r-- | include/llvm/CodeGen/SelectionDAGNodes.h | 16 | ||||
-rw-r--r-- | include/llvm/Target/TargetLowering.h | 6 |
3 files changed, 20 insertions, 6 deletions
diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h index d2d17cf..9060376 100644 --- a/include/llvm/CodeGen/SelectionDAG.h +++ b/include/llvm/CodeGen/SelectionDAG.h @@ -356,7 +356,7 @@ public: /// getVectorShuffle - Return an ISD::VECTOR_SHUFFLE node. The number of /// elements in VT, which must be a vector type, must match the number of - /// mask elements NumElts. A negative integer mask element is treated as + /// mask elements NumElts. A integer mask element equal to -1 is treated as /// undefined. SDValue getVectorShuffle(MVT VT, DebugLoc dl, SDValue N1, SDValue N2, const int *MaskElts); @@ -822,7 +822,7 @@ public: /// getShuffleScalarElt - Returns the scalar element that will make up the ith /// element of the result of the vector shuffle. - SDValue getShuffleScalarElt(const SDNode *N, unsigned Idx); + SDValue getShuffleScalarElt(const ShuffleVectorSDNode *N, unsigned Idx); private: bool RemoveNodeFromCSEMaps(SDNode *N); diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index 34d877a..dc7112c 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -1704,12 +1704,24 @@ public: } }; +/// ShuffleVectorSDNode - This SDNode is used to implement the code generator +/// support for the llvm IR shufflevector instruction. It combines elements +/// from two input vectors into a new input vector, with the selection and +/// ordering of elements determined by an array of integers, referred to as +/// the shuffle mask. For input vectors of width N, mask indices of 0..N-1 +/// refer to elements from the LHS input, and indices from N to 2N-1 the RHS. +/// An index of -1 is treated as undef, such that the code generator may put +/// any value in the corresponding element of the result. class ShuffleVectorSDNode : public SDNode { SDUse Ops[2]; - int *Mask; + + // The memory for Mask is owned by the SelectionDAG's OperandAllocator, and + // is freed when the SelectionDAG object is destroyed. + const int *Mask; protected: friend class SelectionDAG; - ShuffleVectorSDNode(MVT VT, DebugLoc dl, SDValue N1, SDValue N2, int *M) + ShuffleVectorSDNode(MVT VT, DebugLoc dl, SDValue N1, SDValue N2, + const int *M) : SDNode(ISD::VECTOR_SHUFFLE, dl, getSDVTList(VT)), Mask(M) { InitOperands(Ops, N1, N2); } diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 3dbe89d..624f9fc 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -329,7 +329,8 @@ public: /// support *some* VECTOR_SHUFFLE operations, those with specific masks. /// By default, if a target supports the VECTOR_SHUFFLE node, all mask values /// are assumed to be legal. - virtual bool isShuffleMaskLegal(SmallVectorImpl<int> &Mask, MVT VT) const { + virtual bool isShuffleMaskLegal(const SmallVectorImpl<int> &Mask, + MVT VT) const { return true; } @@ -337,7 +338,8 @@ public: /// used by Targets can use this to indicate if there is a suitable /// VECTOR_SHUFFLE that can be used to replace a VAND with a constant /// pool entry. - virtual bool isVectorClearMaskLegal(SmallVectorImpl<int> &M, MVT VT) const { + virtual bool isVectorClearMaskLegal(const SmallVectorImpl<int> &Mask, + MVT VT) const { return false; } |