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| author | Bill Wendling <isanbard@gmail.com> | 2006-12-07 20:28:15 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2006-12-07 20:28:15 +0000 |
| commit | bcd2498f4f1682dbdc41452add5b9bc72cbd6b3f (patch) | |
| tree | c42cc25e701e45736f384bfced29bdbdf66a65a8 /lib/CodeGen/LLVMTargetMachine.cpp | |
| parent | 832171cb9724d2d31c8dfb73172e2be8f6dd13ee (diff) | |
| download | external_llvm-bcd2498f4f1682dbdc41452add5b9bc72cbd6b3f.zip external_llvm-bcd2498f4f1682dbdc41452add5b9bc72cbd6b3f.tar.gz external_llvm-bcd2498f4f1682dbdc41452add5b9bc72cbd6b3f.tar.bz2 | |
Removed more <iostream> includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32321 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LLVMTargetMachine.cpp')
| -rw-r--r-- | lib/CodeGen/LLVMTargetMachine.cpp | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp index f113b16..0098a42 100644 --- a/lib/CodeGen/LLVMTargetMachine.cpp +++ b/lib/CodeGen/LLVMTargetMachine.cpp @@ -17,7 +17,6 @@ #include "llvm/CodeGen/Passes.h" #include "llvm/Target/TargetOptions.h" #include "llvm/Transforms/Scalar.h" -#include <iostream> using namespace llvm; bool LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM, @@ -46,18 +45,18 @@ bool LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM, // Print the instruction selected machine code... if (PrintMachineCode) - PM.add(createMachineFunctionPrinterPass(&std::cerr)); + PM.add(createMachineFunctionPrinterPass(cerr.stream())); // Perform register allocation to convert to a concrete x86 representation PM.add(createRegisterAllocator()); if (PrintMachineCode) - PM.add(createMachineFunctionPrinterPass(&std::cerr)); + PM.add(createMachineFunctionPrinterPass(cerr.stream())); // Run post-ra passes. if (addPostRegAlloc(PM, Fast) && PrintMachineCode) - PM.add(createMachineFunctionPrinterPass(&std::cerr)); + PM.add(createMachineFunctionPrinterPass(cerr.stream())); // Insert prolog/epilog code. Eliminate abstract frame index references... @@ -71,11 +70,11 @@ bool LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM, PM.add(createDebugLabelFoldingPass()); if (PrintMachineCode) // Print the register-allocated code - PM.add(createMachineFunctionPrinterPass(&std::cerr)); + PM.add(createMachineFunctionPrinterPass(cerr.stream())); if (addPreEmitPass(PM, Fast) && PrintMachineCode) - PM.add(createMachineFunctionPrinterPass(&std::cerr)); + PM.add(createMachineFunctionPrinterPass(cerr.stream())); switch (FileType) { @@ -127,32 +126,32 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM, // Print the instruction selected machine code... if (PrintMachineCode) - PM.add(createMachineFunctionPrinterPass(&std::cerr)); + PM.add(createMachineFunctionPrinterPass(cerr.stream())); // Perform register allocation to convert to a concrete x86 representation PM.add(createRegisterAllocator()); if (PrintMachineCode) - PM.add(createMachineFunctionPrinterPass(&std::cerr)); + PM.add(createMachineFunctionPrinterPass(cerr.stream())); // Run post-ra passes. if (addPostRegAlloc(PM, Fast) && PrintMachineCode) - PM.add(createMachineFunctionPrinterPass(&std::cerr)); + PM.add(createMachineFunctionPrinterPass(cerr.stream())); // Insert prolog/epilog code. Eliminate abstract frame index references... PM.add(createPrologEpilogCodeInserter()); if (PrintMachineCode) // Print the register-allocated code - PM.add(createMachineFunctionPrinterPass(&std::cerr)); + PM.add(createMachineFunctionPrinterPass(cerr.stream())); // Branch folding must be run after regalloc and prolog/epilog insertion. if (!Fast) PM.add(createBranchFoldingPass()); if (addPreEmitPass(PM, Fast) && PrintMachineCode) - PM.add(createMachineFunctionPrinterPass(&std::cerr)); + PM.add(createMachineFunctionPrinterPass(cerr.stream())); addCodeEmitter(PM, Fast, MCE); |