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authorDan Gohman <gohman@apple.com>2009-10-07 17:47:20 +0000
committerDan Gohman <gohman@apple.com>2009-10-07 17:47:20 +0000
commit2627e08e05d8e7521f7c03496ede45868144d426 (patch)
tree2ae651fadf4328d56f2b8412358c093737c35cc0 /lib/CodeGen/LiveIntervalAnalysis.cpp
parente33f44cfc547359bc28526e4c5e1852b600b4448 (diff)
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Replace some code for aggressive-remat with MachineInstr::isInvariantLoad, and
teach it how to recognize invariant physical registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83476 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LiveIntervalAnalysis.cpp')
-rw-r--r--lib/CodeGen/LiveIntervalAnalysis.cpp51
1 files changed, 28 insertions, 23 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index b0df51d..4fa172f 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -1428,32 +1428,16 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li,
if (!EnableAggressiveRemat)
return false;
- // If the instruction accesses memory but the memoperands have been lost,
- // we can't analyze it.
const TargetInstrDesc &TID = MI->getDesc();
- if ((TID.mayLoad() || TID.mayStore()) && MI->memoperands_empty())
- return false;
// Avoid instructions obviously unsafe for remat.
- if (TID.hasUnmodeledSideEffects() || TID.isNotDuplicable())
+ if (TID.hasUnmodeledSideEffects() || TID.isNotDuplicable() ||
+ TID.mayStore())
return false;
- // If the instruction accesses memory and the memory could be non-constant,
- // assume the instruction is not rematerializable.
- for (MachineInstr::mmo_iterator I = MI->memoperands_begin(),
- E = MI->memoperands_end(); I != E; ++I){
- const MachineMemOperand *MMO = *I;
- if (MMO->isVolatile() || MMO->isStore())
- return false;
- const Value *V = MMO->getValue();
- if (!V)
- return false;
- if (const PseudoSourceValue *PSV = dyn_cast<PseudoSourceValue>(V)) {
- if (!PSV->isConstant(mf_->getFrameInfo()))
- return false;
- } else if (!aa_->pointsToConstantMemory(V))
- return false;
- }
+ // Avoid instructions which load from potentially varying memory.
+ if (TID.mayLoad() && !MI->isInvariantLoad(aa_))
+ return false;
// If any of the registers accessed are non-constant, conservatively assume
// the instruction is not rematerializable.
@@ -1464,8 +1448,29 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li,
unsigned Reg = MO.getReg();
if (Reg == 0)
continue;
- if (TargetRegisterInfo::isPhysicalRegister(Reg))
- return false;
+ if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
+ if (MO.isUse()) {
+ // If the physreg has no defs anywhere, it's just an ambient register
+ // and we can freely move its uses. Alternatively, if it's allocatable,
+ // it could get allocated to something with a def during allocation.
+ if (!mri_->def_empty(Reg))
+ return false;
+ if (allocatableRegs_.test(Reg))
+ return false;
+ // Check for a def among the register's aliases too.
+ for (const unsigned *Alias = tri_->getAliasSet(Reg); *Alias; ++Alias) {
+ unsigned AliasReg = *Alias;
+ if (!mri_->def_empty(AliasReg))
+ return false;
+ if (allocatableRegs_.test(AliasReg))
+ return false;
+ }
+ } else {
+ // A physreg def. We can't remat it.
+ return false;
+ }
+ continue;
+ }
// Only allow one def, and that in the first operand.
if (MO.isDef() != (i == 0))