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author | Evan Cheng <evan.cheng@apple.com> | 2008-12-05 17:41:31 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2008-12-05 17:41:31 +0000 |
commit | eb7a09bd42ba8da2be271860ae3500b409546c67 (patch) | |
tree | adbaae4cd8c7f3b2efeb8239320a51a992ea1cb1 /lib/CodeGen/LiveIntervalAnalysis.cpp | |
parent | f95d0fc604058938191797a54950bd2402ec8558 (diff) | |
download | external_llvm-eb7a09bd42ba8da2be271860ae3500b409546c67.zip external_llvm-eb7a09bd42ba8da2be271860ae3500b409546c67.tar.gz external_llvm-eb7a09bd42ba8da2be271860ae3500b409546c67.tar.bz2 |
Reason #3 from 60595 doesn't hold true. If we can fold a PIC load from constpool into a use, the rewrite happens at time of spill (not in VirtRegMap). Later on, if the GlobalBaseReg is spilled, the spiller can see the use uses GlobalBaseReg and do the right thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60596 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LiveIntervalAnalysis.cpp')
-rw-r--r-- | lib/CodeGen/LiveIntervalAnalysis.cpp | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index 31b300a..1df6c7d 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -2059,15 +2059,17 @@ addIntervalsForSpills(const LiveInterval &li, if (isLoadSS || ReMatDefMI->getDesc().canFoldAsLoad()) Folded = tryFoldMemoryOperand(MI, vrm, ReMatDefMI, index, Ops, isLoadSS, LdSlot, VReg); - unsigned ImpUse = getReMatImplicitUse(li, ReMatDefMI); - if (ImpUse) { - // Re-matting an instruction with virtual register use. Add the - // register as an implicit use on the use MI and update the register - // interval's spill weight to HUGE_VALF to prevent it from being - // spilled. - LiveInterval &ImpLi = getInterval(ImpUse); - ImpLi.weight = HUGE_VALF; - MI->addOperand(MachineOperand::CreateReg(ImpUse, false, true)); + if (!Folded) { + unsigned ImpUse = getReMatImplicitUse(li, ReMatDefMI); + if (ImpUse) { + // Re-matting an instruction with virtual register use. Add the + // register as an implicit use on the use MI and update the register + // interval's spill weight to HUGE_VALF to prevent it from being + // spilled. + LiveInterval &ImpLi = getInterval(ImpUse); + ImpLi.weight = HUGE_VALF; + MI->addOperand(MachineOperand::CreateReg(ImpUse, false, true)); + } } } } |