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author | David Greene <greened@obbligato.org> | 2010-01-04 23:06:47 +0000 |
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committer | David Greene <greened@obbligato.org> | 2010-01-04 23:06:47 +0000 |
commit | 6d206f8fc90e0e4222fd4f9e93f0ce40197560f3 (patch) | |
tree | 10f7c65fea19ae052b73a9c196f449bed5920afc /lib/CodeGen/LowerSubregs.cpp | |
parent | ba1d8264e65b37146dbc26c71c748b5c7020ae88 (diff) | |
download | external_llvm-6d206f8fc90e0e4222fd4f9e93f0ce40197560f3.zip external_llvm-6d206f8fc90e0e4222fd4f9e93f0ce40197560f3.tar.gz external_llvm-6d206f8fc90e0e4222fd4f9e93f0ce40197560f3.tar.bz2 |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92535 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LowerSubregs.cpp')
-rw-r--r-- | lib/CodeGen/LowerSubregs.cpp | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/lib/CodeGen/LowerSubregs.cpp b/lib/CodeGen/LowerSubregs.cpp index 80eb6cd..1121d9b 100644 --- a/lib/CodeGen/LowerSubregs.cpp +++ b/lib/CodeGen/LowerSubregs.cpp @@ -122,7 +122,7 @@ bool LowerSubregsInstructionPass::LowerExtract(MachineInstr *MI) { "Extract destination must be in a physical register"); assert(SrcReg && "invalid subregister index for register"); - DEBUG(errs() << "subreg: CONVERTING: " << *MI); + DEBUG(dbgs() << "subreg: CONVERTING: " << *MI); if (SrcReg == DstReg) { // No need to insert an identity copy instruction. @@ -131,11 +131,11 @@ bool LowerSubregsInstructionPass::LowerExtract(MachineInstr *MI) { // instruction with KILL. MI->setDesc(TII->get(TargetInstrInfo::KILL)); MI->RemoveOperand(2); // SubIdx - DEBUG(errs() << "subreg: replace by: " << *MI); + DEBUG(dbgs() << "subreg: replace by: " << *MI); return true; } - DEBUG(errs() << "subreg: eliminated!"); + DEBUG(dbgs() << "subreg: eliminated!"); } else { // Insert copy const TargetRegisterClass *TRCS = TRI->getPhysicalRegisterRegClass(DstReg); @@ -150,11 +150,11 @@ bool LowerSubregsInstructionPass::LowerExtract(MachineInstr *MI) { TransferKillFlag(MI, SuperReg, TRI, true); DEBUG({ MachineBasicBlock::iterator dMI = MI; - errs() << "subreg: " << *(--dMI); + dbgs() << "subreg: " << *(--dMI); }); } - DEBUG(errs() << '\n'); + DEBUG(dbgs() << '\n'); MBB->erase(MI); return true; } @@ -179,7 +179,7 @@ bool LowerSubregsInstructionPass::LowerSubregToReg(MachineInstr *MI) { assert(TargetRegisterInfo::isPhysicalRegister(InsReg) && "Inserted value must be in a physical register"); - DEBUG(errs() << "subreg: CONVERTING: " << *MI); + DEBUG(dbgs() << "subreg: CONVERTING: " << *MI); if (DstSubReg == InsReg && InsSIdx == 0) { // No need to insert an identify copy instruction. @@ -188,7 +188,7 @@ bool LowerSubregsInstructionPass::LowerSubregToReg(MachineInstr *MI) { // %RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3 // The first def is defining RAX, not EAX so the top bits were not // zero extended. - DEBUG(errs() << "subreg: eliminated!"); + DEBUG(dbgs() << "subreg: eliminated!"); } else { // Insert sub-register copy const TargetRegisterClass *TRC0= TRI->getPhysicalRegisterRegClass(DstSubReg); @@ -203,11 +203,11 @@ bool LowerSubregsInstructionPass::LowerSubregToReg(MachineInstr *MI) { TransferKillFlag(MI, InsReg, TRI); DEBUG({ MachineBasicBlock::iterator dMI = MI; - errs() << "subreg: " << *(--dMI); + dbgs() << "subreg: " << *(--dMI); }); } - DEBUG(errs() << '\n'); + DEBUG(dbgs() << '\n'); MBB->erase(MI); return true; } @@ -235,7 +235,7 @@ bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) { assert(TargetRegisterInfo::isPhysicalRegister(InsReg) && "Inserted value must be in a physical register"); - DEBUG(errs() << "subreg: CONVERTING: " << *MI); + DEBUG(dbgs() << "subreg: CONVERTING: " << *MI); if (DstSubReg == InsReg) { // No need to insert an identity copy instruction. If the SrcReg was @@ -248,7 +248,7 @@ bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) { else MIB.addReg(InsReg, RegState::Kill); } else { - DEBUG(errs() << "subreg: eliminated!\n"); + DEBUG(dbgs() << "subreg: eliminated!\n"); MBB->erase(MI); return true; } @@ -288,7 +288,7 @@ bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) { DEBUG({ MachineBasicBlock::iterator dMI = MI; - errs() << "subreg: " << *(--dMI) << "\n"; + dbgs() << "subreg: " << *(--dMI) << "\n"; }); MBB->erase(MI); @@ -299,7 +299,7 @@ bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) { /// copies. /// bool LowerSubregsInstructionPass::runOnMachineFunction(MachineFunction &MF) { - DEBUG(errs() << "Machine Function\n" + DEBUG(dbgs() << "Machine Function\n" << "********** LOWERING SUBREG INSTRS **********\n" << "********** Function: " << MF.getFunction()->getName() << '\n'); |