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author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 13:55:26 +0000 |
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committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 13:55:26 +0000 |
commit | d519756203868b1bb92f2be9a357850689886ee2 (patch) | |
tree | f37a24a19f950fb51ebfd806d95216467796ee3a /lib/CodeGen/LowerSubregs.cpp | |
parent | 3e980b4f1136264815e43f246d37f20a66b749d8 (diff) | |
download | external_llvm-d519756203868b1bb92f2be9a357850689886ee2.zip external_llvm-d519756203868b1bb92f2be9a357850689886ee2.tar.gz external_llvm-d519756203868b1bb92f2be9a357850689886ee2.tar.bz2 |
Let RegisterInfo decide whether it can emit cross-class copy or not
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75955 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LowerSubregs.cpp')
-rw-r--r-- | lib/CodeGen/LowerSubregs.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/lib/CodeGen/LowerSubregs.cpp b/lib/CodeGen/LowerSubregs.cpp index 14acb71..5008f14 100644 --- a/lib/CodeGen/LowerSubregs.cpp +++ b/lib/CodeGen/LowerSubregs.cpp @@ -132,10 +132,11 @@ bool LowerSubregsInstructionPass::LowerExtract(MachineInstr *MI) { } } else { // Insert copy - const TargetRegisterClass *TRC = TRI.getPhysicalRegisterRegClass(DstReg); - assert(TRC == TRI.getPhysicalRegisterRegClass(SrcReg) && - "Extract subreg and Dst must be of same register class"); - TII.copyRegToReg(*MBB, MI, DstReg, SrcReg, TRC, TRC); + const TargetRegisterClass *TRCS = TRI.getPhysicalRegisterRegClass(DstReg); + const TargetRegisterClass *TRCD = TRI.getPhysicalRegisterRegClass(SrcReg); + bool Emitted = TII.copyRegToReg(*MBB, MI, DstReg, SrcReg, TRCD, TRCS); + (void)Emitted; + assert(Emitted && "Subreg and Dst must be of compatible register class"); // Transfer the kill/dead flags, if needed. if (MI->getOperand(0).isDead()) TransferDeadFlag(MI, DstReg, TRI); |