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authorDan Gohman <gohman@apple.com>2008-09-03 15:56:16 +0000
committerDan Gohman <gohman@apple.com>2008-09-03 15:56:16 +0000
commit244b86aa5261f8cc7e7cb2a018005136379ab76d (patch)
treef165fbd55c3f61a5325ffcecc5448533ffb6c102 /lib/CodeGen/MachineInstr.cpp
parentbad32949d6191f6167d08a51328fa04062d41db2 (diff)
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Fix addRegisterDead and addRegisterKilled to be more thorough
when searching for redundant subregister dead/kill bits. Previously it was common to see instructions marked like this: "RET %EAX<imp-use,kill>, %AX<imp-use,kill>" With this change, addRegisterKilled continues scanning after finding the %EAX operand, so it proceeds to discover the redundant %AX kill and eliminates it, producing this: "RET %EAX<imp-use,kill>" This currently has no effect on the generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55698 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineInstr.cpp')
-rw-r--r--lib/CodeGen/MachineInstr.cpp53
1 files changed, 34 insertions, 19 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index ce5c523..9fbae68 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -800,6 +800,7 @@ bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
bool AddIfNotFound) {
bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg);
bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg);
+ bool Found = false;
SmallVector<unsigned,4> DeadOps;
for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
MachineOperand &MO = getOperand(i);
@@ -810,11 +811,15 @@ bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
continue;
if (Reg == IncomingReg) {
- MO.setIsKill();
- return true;
- }
- if (hasAliases && MO.isKill() &&
- TargetRegisterInfo::isPhysicalRegister(Reg)) {
+ if (!Found) {
+ if (MO.isKill())
+ // The register is already marked kill.
+ return true;
+ MO.setIsKill();
+ Found = true;
+ }
+ } else if (hasAliases && MO.isKill() &&
+ TargetRegisterInfo::isPhysicalRegister(Reg)) {
// A super-register kill already exists.
if (RegInfo->isSuperRegister(IncomingReg, Reg))
return true;
@@ -835,14 +840,14 @@ bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
// If not found, this means an alias of one of the operands is killed. Add a
// new implicit operand if required.
- if (AddIfNotFound) {
+ if (!Found && AddIfNotFound) {
addOperand(MachineOperand::CreateReg(IncomingReg,
false /*IsDef*/,
true /*IsImp*/,
true /*IsKill*/));
return true;
}
- return false;
+ return Found;
}
bool MachineInstr::addRegisterDead(unsigned IncomingReg,
@@ -850,18 +855,26 @@ bool MachineInstr::addRegisterDead(unsigned IncomingReg,
bool AddIfNotFound) {
bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg);
bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg);
+ bool Found = false;
SmallVector<unsigned,4> DeadOps;
for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
MachineOperand &MO = getOperand(i);
if (!MO.isRegister() || !MO.isDef())
continue;
unsigned Reg = MO.getReg();
+ if (!Reg)
+ continue;
+
if (Reg == IncomingReg) {
- MO.setIsDead();
- return true;
- }
- if (hasAliases && MO.isDead() &&
- TargetRegisterInfo::isPhysicalRegister(Reg)) {
+ if (!Found) {
+ if (MO.isDead())
+ // The register is already marked dead.
+ return true;
+ MO.setIsDead();
+ Found = true;
+ }
+ } else if (hasAliases && MO.isDead() &&
+ TargetRegisterInfo::isPhysicalRegister(Reg)) {
// There exists a super-register that's marked dead.
if (RegInfo->isSuperRegister(IncomingReg, Reg))
return true;
@@ -882,13 +895,15 @@ bool MachineInstr::addRegisterDead(unsigned IncomingReg,
DeadOps.pop_back();
}
- // If not found, this means an alias of one of the operand is dead. Add a
- // new implicit operand.
- if (AddIfNotFound) {
- addOperand(MachineOperand::CreateReg(IncomingReg, true/*IsDef*/,
- true/*IsImp*/,false/*IsKill*/,
- true/*IsDead*/));
+ // If not found, this means an alias of one of the operands is dead. Add a
+ // new implicit operand if required.
+ if (!Found && AddIfNotFound) {
+ addOperand(MachineOperand::CreateReg(IncomingReg,
+ true /*IsDef*/,
+ true /*IsImp*/,
+ false /*IsKill*/,
+ true /*IsDead*/));
return true;
}
- return false;
+ return Found;
}