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authorEvan Cheng <evan.cheng@apple.com>2011-10-12 21:33:49 +0000
committerEvan Cheng <evan.cheng@apple.com>2011-10-12 21:33:49 +0000
commit7007e4c5564f32fe4f06765a9740218039e7b492 (patch)
treea9d0e1c69fd81fd0652715bda7802517e44b1ba4 /lib/CodeGen/MachineLICM.cpp
parent980df169203a5f60793e758cdc5cbcad853ca9eb (diff)
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Disable machine LICM speculation check (for profitability) until I have time to investigate the regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141813 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineLICM.cpp')
-rw-r--r--lib/CodeGen/MachineLICM.cpp21
1 files changed, 15 insertions, 6 deletions
diff --git a/lib/CodeGen/MachineLICM.cpp b/lib/CodeGen/MachineLICM.cpp
index 889406a..25109ab 100644
--- a/lib/CodeGen/MachineLICM.cpp
+++ b/lib/CodeGen/MachineLICM.cpp
@@ -37,10 +37,16 @@
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/Statistic.h"
+#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
+static cl::opt<bool>
+AvoidSpeculation("avoid-speculation",
+ cl::desc("MachineLICM should avoid speculation"),
+ cl::init(false), cl::Hidden);
+
STATISTIC(NumHoisted,
"Number of machine instructions hoisted out of loops");
STATISTIC(NumLowRP,
@@ -1052,14 +1058,17 @@ bool MachineLICM::IsProfitableToHoist(MachineInstr &MI) {
return true;
}
- // High register pressure situation, only hoist if the instruction is going to
- // be remat'ed.
- // Also, do not "speculate" in high register pressure situation. If an
+ // Do not "speculate" in high register pressure situation. If an
// instruction is not guaranteed to be executed in the loop, it's best to be
// conservative.
- if ((!IsGuaranteedToExecute(MI.getParent()) && !MayCSE(&MI)) ||
- (!TII->isTriviallyReMaterializable(&MI, AA) &&
- !MI.isInvariantLoad(AA)))
+ if (AvoidSpeculation &&
+ (!IsGuaranteedToExecute(MI.getParent()) && !MayCSE(&MI)))
+ return false;
+
+ // High register pressure situation, only hoist if the instruction is going to
+ // be remat'ed.
+ if (!TII->isTriviallyReMaterializable(&MI, AA) &&
+ !MI.isInvariantLoad(AA))
return false;
}