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author | Lang Hames <lhames@gmail.com> | 2009-05-18 19:03:16 +0000 |
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committer | Lang Hames <lhames@gmail.com> | 2009-05-18 19:03:16 +0000 |
commit | 8d4e3038f1a00e63afb589dcfc17213f37aebfd8 (patch) | |
tree | d666c209dae6bb7d4c8720a3f06cccd9a6b17ec7 /lib/CodeGen/RegAllocLinearScan.cpp | |
parent | d645434d43bfc0f7754171e33385af5a7ad484c6 (diff) | |
download | external_llvm-8d4e3038f1a00e63afb589dcfc17213f37aebfd8.zip external_llvm-8d4e3038f1a00e63afb589dcfc17213f37aebfd8.tar.gz external_llvm-8d4e3038f1a00e63afb589dcfc17213f37aebfd8.tar.bz2 |
New Spiller interface and trivial implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72030 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocLinearScan.cpp')
-rw-r--r-- | lib/CodeGen/RegAllocLinearScan.cpp | 26 |
1 files changed, 24 insertions, 2 deletions
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index c5ce455..ac6ab32 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -14,6 +14,7 @@ #define DEBUG_TYPE "regalloc" #include "VirtRegMap.h" #include "VirtRegRewriter.h" +#include "Spiller.h" #include "llvm/Function.h" #include "llvm/CodeGen/LiveIntervalAnalysis.h" #include "llvm/CodeGen/LiveStackAnalysis.h" @@ -56,6 +57,11 @@ PreSplitIntervals("pre-alloc-split", cl::desc("Pre-register allocation live interval splitting"), cl::init(false), cl::Hidden); +static cl::opt<bool> +NewSpillFramework("new-spill-framework", + cl::desc("New spilling framework"), + cl::init(false), cl::Hidden); + static RegisterRegAlloc linearscanRegAlloc("linearscan", "linear scan register allocator", createLinearScanRegisterAllocator); @@ -127,6 +133,8 @@ namespace { std::auto_ptr<VirtRegRewriter> rewriter_; + std::auto_ptr<Spiller> spiller_; + public: virtual const char* getPassName() const { return "Linear Scan Register Allocator"; @@ -420,6 +428,13 @@ bool RALinScan::runOnMachineFunction(MachineFunction &fn) { vrm_ = &getAnalysis<VirtRegMap>(); if (!rewriter_.get()) rewriter_.reset(createVirtRegRewriter()); + + if (NewSpillFramework) { + spiller_.reset(createSpiller(mf_, li_, vrm_)); + } + else { + spiller_.reset(0); + } initIntervalSets(); @@ -1108,8 +1123,15 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) if (cur->weight != HUGE_VALF && cur->weight <= minWeight) { DOUT << "\t\t\tspilling(c): " << *cur << '\n'; SmallVector<LiveInterval*, 8> spillIs; - std::vector<LiveInterval*> added = - li_->addIntervalsForSpills(*cur, spillIs, loopInfo, *vrm_); + std::vector<LiveInterval*> added; + + if (!NewSpillFramework) { + added = li_->addIntervalsForSpills(*cur, spillIs, loopInfo, *vrm_); + } + else { + added = spiller_->spill(cur); + } + std::sort(added.begin(), added.end(), LISorter()); addStackInterval(cur, ls_, li_, mri_, *vrm_); if (added.empty()) |