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author | Bill Wendling <isanbard@gmail.com> | 2008-02-26 21:47:57 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2008-02-26 21:47:57 +0000 |
commit | e6d088acc90e422451e098555d383d4d65b6ce6b (patch) | |
tree | 7b96c43f8dac3ea29c64a51a05d62cc6d564175f /lib/CodeGen/RegAllocLinearScan.cpp | |
parent | 95e78348f08fab152b2b03c516cc9f22ed60b8de (diff) | |
download | external_llvm-e6d088acc90e422451e098555d383d4d65b6ce6b.zip external_llvm-e6d088acc90e422451e098555d383d4d65b6ce6b.tar.gz external_llvm-e6d088acc90e422451e098555d383d4d65b6ce6b.tar.bz2 |
Rename PrintableName to Name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47629 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocLinearScan.cpp')
-rw-r--r-- | lib/CodeGen/RegAllocLinearScan.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index aa042c7..dd3ea7d 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -164,7 +164,7 @@ namespace { if (TargetRegisterInfo::isVirtualRegister(reg)) { reg = vrm_->getPhys(reg); } - DOUT << tri_->getPrintableName(reg) << '\n'; + DOUT << tri_->getName(reg) << '\n'; } } }; @@ -239,7 +239,7 @@ unsigned RALinScan::attemptTrivialCoalescing(LiveInterval &cur, unsigned Reg) { // Try to coalesce. if (!li_->conflictsWithPhysRegDef(cur, *vrm_, SrcReg)) { - DOUT << "Coalescing: " << cur << " -> " << tri_->getPrintableName(SrcReg) + DOUT << "Coalescing: " << cur << " -> " << tri_->getName(SrcReg) << '\n'; vrm_->clearVirt(cur.reg); vrm_->assignVirt2Phys(cur.reg, SrcReg); @@ -628,7 +628,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) // the free physical register and add this interval to the active // list. if (physReg) { - DOUT << tri_->getPrintableName(physReg) << '\n'; + DOUT << tri_->getName(physReg) << '\n'; vrm_->assignVirt2Phys(cur->reg, physReg); prt_->addRegUse(physReg); active_.push_back(std::make_pair(cur, cur->begin())); @@ -690,7 +690,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) } DOUT << "\t\tregister with min weight: " - << tri_->getPrintableName(minReg) << " (" << minWeight << ")\n"; + << tri_->getName(minReg) << " (" << minWeight << ")\n"; // if the current has the minimum weight, we need to spill it and // add any added intervals back to unhandled, and restart @@ -869,11 +869,11 @@ unsigned RALinScan::getFreePhysReg(LiveInterval *cur) { if (cur->preference) { if (prt_->isRegAvail(cur->preference)) { DOUT << "\t\tassigned the preferred register: " - << tri_->getPrintableName(cur->preference) << "\n"; + << tri_->getName(cur->preference) << "\n"; return cur->preference; } else DOUT << "\t\tunable to assign the preferred register: " - << tri_->getPrintableName(cur->preference) << "\n"; + << tri_->getName(cur->preference) << "\n"; } // Scan for the first available register. |