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authorChris Lattner <sabre@nondot.org>2002-12-17 03:16:10 +0000
committerChris Lattner <sabre@nondot.org>2002-12-17 03:16:10 +0000
commit86c69a6cbe0c4c08ab3f57bcd47b11b0479849fc (patch)
tree30ea21e62e6a3dcad304bffbb59cee441e5e4a10 /lib/CodeGen/RegAllocLocal.cpp
parent3bbe7cc51dd402871d206ca3fb77f84240e0c100 (diff)
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Add prolog/epilog spills/reloads to counters
Move X86 specific alignment gunk to X86 files git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5096 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocLocal.cpp')
-rw-r--r--lib/CodeGen/RegAllocLocal.cpp11
1 files changed, 7 insertions, 4 deletions
diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index 6ac2d33..e5c70a1 100644
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -547,6 +547,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
assert(PhysRegsUseOrder.empty() && "Physical regs still allocated?");
}
+
/// EmitPrologue - Use the register info object to add a prologue to the
/// function and save any callee saved registers we are responsible for.
///
@@ -564,18 +565,19 @@ void RA::EmitPrologue() {
unsigned Offset = getStackSpaceFor(CSRegs[i], RegClass);
// Insert the spill to the stack frame...
+ ++NumSpilled;
I = RegInfo.storeReg2RegOffset(MBB, I, CSRegs[i], RegInfo.getFramePointer(),
-Offset, RegClass->getDataSize());
}
- // Round stack allocation up to a nice alignment to keep the stack aligned
- // FIXME: This is X86 specific! Move to RegInfo.emitPrologue()!
- NumBytesAllocated = (NumBytesAllocated + 3) & ~3;
-
// Add prologue to the function...
RegInfo.emitPrologue(*MF, NumBytesAllocated);
}
+
+/// EmitEpilogue - Use the register info object to add a epilogue to the
+/// function and restore any callee saved registers we are responsible for.
+///
void RA::EmitEpilogue(MachineBasicBlock &MBB) {
// Insert instructions before the return.
MachineBasicBlock::iterator I = --MBB.end();
@@ -584,6 +586,7 @@ void RA::EmitEpilogue(MachineBasicBlock &MBB) {
for (unsigned i = 0; CSRegs[i]; ++i) {
const TargetRegisterClass *RegClass = PhysRegClasses[CSRegs[i]];
unsigned Offset = getStackSpaceFor(CSRegs[i], RegClass);
+ ++NumReloaded;
I = RegInfo.loadRegOffset2Reg(MBB, I, CSRegs[i], RegInfo.getFramePointer(),
-Offset, RegClass->getDataSize());
--I; // Insert in reverse order